Job Description:The role of a Design Verification Lead includes but is not limited to
- UVM based testbench development at Subsystem, SOC level and BFM integration.
- Creating test plans for RTL validation including functional coverage and assertions
- Developing pre-Silicon functional validation tests and testbench components like monitors and scoreboards
- Bring up and debug UPF based and Gate level and performance simulations
- Working on core based simulations and C testcases, handshake between SV and C tests.
- Hands on experience in Highspeed protocols like PCIE and UCIE
- Working with ARM architecture and protocols like AXI, APB, CHI, CXS.
- Mentoring and coaching team members
Qualifications:Masters / Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or in a related field of study
10+ years of experience in Design Verification
Developing UVM and/or Formal-based verification architectures and methodologiesPreferred Qualifications:
- Graduate/post-graduatedegree in Electrical Engineering, Computer Engineering, Computer Science, or a related field of study
- Experience in DV and testbench development at Subsystem and SOC level.
- Experience with scripting languages
- Low power simulations experience (e.g., UPF)
- Formal verification experience
- Experience with PCIE, UCIE, DDR and ARM Architecture
Experienced HireShift 1 (India)India, Bangalore