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Intel Analog Circuit Design Engineer 
India, Karnataka, Bengaluru 
18124356

08.07.2024

Proven skills in design and understanding blocks like transmitter, receiver, clocking or common and skill to work through a team of junior engineers. Should be comfortable with collateral generation flows like .lib, static timing analysis for AIP, UPF, BMOD, LEF, NDM and netlist/OA generation for place and route integration.Needs to have working knowledge in associated design domains e.g. layout, .libs and Verilog modelling, to enable delivery of IPsNeed to work with inter-domain disciplines and need to have strong communication skills and problem solving skillsThe responsibilities will include design, development, qualification and collateral generation support of Analog IPs like SERDES, D2D (UCIE) GPIOs, Thermal Sensor, PLL, ADC/DAC/ VR/LDOs etc on leading edge Intel technologiesThe candidate should have B.Tech or M.Tech in Electronics/Electrical/VLSI Design EngineeringThe candidate should have relevant work experience of 4-10 years in Analog and SERDES IO IP design e.g. GPIOs, Thermal Sensor, PLL, ADC/DAC/ Voltage regulators/LDOs, AIB, HBMIO, DDR, HDMI/DP IO, MIPI IO etc.We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits