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Google Security RTL Design Engineer Early career 
India, Karnataka, Bengaluru 
180870840

14.08.2024
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience.
  • Experience with ASIC design methodologies and Quality Assurance flows (e.g., VCLP, Lint, CDC, RDC, SGDFT).
  • Experience designing RTL digital logic using SystemVerilog for ASICs or similar.
  • Experience with a scripting language such as Perl or Python.
  • Experience with area, power and performance development.

Preferred qualifications:
  • Master's degree or PhD in Electrical Engineering, Computer Science, or a related field.
  • Experience with design and development of security blocks or crypto blocks.