As part of the Job profile; the candidate would be required to research, design, develop, and optimize Soft Fabric IPs using RTL design techniques that enable the use in Field Programmable Gate Arrays (FPGA).
Qualifications- Digital logic design experience in Verilog/SystemVerilog/VHDL
- Experience in developing unit level testbenches with Verilog/SystemVerilog
- Experience with simulation tools like VCS and Modelsim
- Knowledge of industry standard Memory Mapped and Streaming protocols including AMBA AXI protocols.
- Familiarity with network-on-chip (NoC) topologies and design methodology.
- Experience in FPGA design and familiarity with FPGA design tools - Intel FPGA Quartus, Xilinx Vivado, Vitis etc.
- Experience in timing closure for high speed FPGA designs
- Knowledge of scripting in tcl, perl or python.
- Excellent communication Skills
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing BenefitsThis role will require an on-site presence.