המקום בו המומחים והחברות הטובות ביותר נפגשים
Performs functional logic verification of an integrated SoC to ensure design will meet specifications. Defines and develops scalable and reusable block, subsystem, and SoC verification plans, test benches, and the verification environment to meet the required level of coverage and confirm to microarchitecture specifications.
Executes verification plans and defines and runs emulation and system simulation models to verify the design, analyze power and performance, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment.
Absorbs learning from post silicon on the quality of validation done during micro architects development, updates test plan for missing coverages, and proliferates to future products.
Minimum Qualifications:
Preferred Qualifications:
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