Bachelor's degree or equivalent practical experience.
10 years of experience with full-chip/SoC verification (e.g., test definition, creation, execution, and debug).
Experience developing full-chip/SoC tests using these environments/tools (e.g., ASM, C, C++, Perspec, OS, or drivers).
Experience with industry standard emulator technologies (e.g., HAPS, Zebu, Veloce, or Palladium) ranging from build tools to advanced capabilities (e.g. power aware emulation).
Experience with execution and RTL/firmware/software debug on Hardware Emulation (e.g., ZeBu Server, Palladium, Veloce) or FPGA (e.g., Xilinx, Altera).
Preferred qualifications:
Experience with EDA debug tools (e.g., Verdi, SimVision/Indago, GDB).
Experience in programming and scripting in C, C++, Python, Perl, and/or TCL.
Understanding of SoC architecture and interfaces (e.g., DDR, PCIe, etc.).
Understanding of RTL to Emulation/FPGA flows including Emulation test benches (e.g., Transactors/Accelerated VIPs, Hybrid, In-circuit Emulation).