Intel Datapath Design Engineer 

China, Liaoning, Dalian 

155461167

Key Responsibilities:

• Lead the design and development of data and I/O circuits for 3D NAND Flash memory products, focusing on achieving higher I/O speeds and optimal performance.
• Architect and construct robust high-speed I/O solutions, ensuring they meet stringent area, power, and performance requirements within process limitations.
• Oversee front-end and back-end high-speed I/O testing in post-silicon phases, ensuring product integrity and performance.
• Collaborate closely with layout designers to optimize circuit area and performance, adhering to best practices in high-speed circuit design.

• Interface with cross-functional teams to address and resolve product-level challenges, ensuring seamless integration and functionality

Minimum Qualifications:

• A Master or above degree in Electrical Engineering or a related field, with at least 10 years of experience in I/O design.
• Proven expertise in RX, TX, and I/O pipeline circuit design and debugging.
• Hands-on experience with DDR I/O interface training and calibration techniques.
• A deep understanding of high-speed I/O circuit layouts and the intricacies of their design.
• Knowledge of high-speed I/O operational mechanisms and associated reliability concerns.
• Experience with power and signal integrity challenges in high-speed I/O domains.
• Exceptional communication skills, with the ability to articulate complex technical concepts to peers and cross-functional teams.

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing BenefitsThis role will require an on-site presence.