Key Responsibilities :
Develop and deliver technical training on new features and product updates
Communicate customers' technical requirements as well as customer issues to the product and sales teams
Qualifications :
More than 1 year experiences related with register-transfer-level (RTL) digital logic design, functional verification methodology, static verification, and FPGA & emulation a plus
Bachelor’s degree in EE and related field required
Strong written and oral communications in the English language is a plus
With strong communications and interpersonal skills
This experience should include some of the followings:
Job Experience Requirement
- Verification of Full SoC and IP level : Verilog RTL simulation is must, Validation of IP on FPGA platform is a plus
- Familiar with System Verilog, UVM is must
- SOC work & verification with ARM Cores, protocols like AXI, ACE, APB ... a plus
- Familiar with mobile AP, memory spec. like DDR, LPDDR is a plus
Tool Experience
- Design and Simulation in RTL : Verilog-HDL, NC-Verilog, Xcelium, Questa, VCS
- RTL Debugger: DVE, Verdi, Simvision
- Logic Synthesis : DC Complier is a plus
- Power verification : Power Pro, Spyglass, UPF flow verification is a plus
Desirable Qualifications
- System Verilog, OVM/UVM, SVA
- SystemC, C/C++, Tcl/TK, PERL as a plus
- Synthesis, CDC and Static timing analysis as a plus
We offer a comprehensive reward package which includes a competitive basic salary, bonus scheme, generous holiday allowance, pension, and private healthcare.