דרושים Gpu Computing Capacity Optimization Engineer ב-אנבידיה ב-United States, Texas

What you'll be doing:

• Work with architects, designers, and performance engineers to develop an energy-efficient GPU.

• Identify key design features and workloads for building Machine Learning based unit power/energy models.

• Develop and own methodologies and workflows to train models using ML and/or statistical techniques.

• Improve the accuracy of trained models by using different model representations, objective functions, and learning algorithms.

• Develop methodologies to estimate data movement power/energy accurately.

• Correlate the predicted energy from models built at different stages of the design cycle, with the goal of bridging early estimates to silicon.

• Work with performance infrastructure teams to integrate power/energy models into their platforms to enable combined reporting of performance and power for various workloads.

• Develop tools to debug energy inefficiencies observed in various workloads run on silicon, RTL, and architectural simulators. Identify and suggest solutions to fix the energy inefficiencies.

• Prototype new architectural features, build an energy model for those new features, and analyze the system impact.

• Identify, suggest, and/or participate in studies for improving GPU perf/watt.

What we need to see:

• Pursuing or recently completed a MS or PhD in Electrical Engineering, Computer Engineering, Computer Scienceor equivalent experience.

• Strong coding skills, preferably in Python, C++.

• Background in machine learning, AI, and/or statistical modeling.

• Background in computer architecture and interest in energy-efficient GPU designs.

• Familiarity with Verilog and ASIC design principles is a plus.

• Ability to formulate and analyze algorithms, and comment on their runtime and memory complexities.

• Basic understanding of fundamental concepts of energy consumption, estimation, and low power design.

• Desire to bring quantitative decision-making and analytics to improve the energy efficiency of our products.

• Good verbal/written communication and interpersonal skills.

Collaborating with your peers across various engineering groups, you will optimally launch new systems for NVIDIA HGX GPU Accelerated Server Platforms to production. These purpose-built systems are optimized for the growing Deep Learning, Artificial Intelligence, and Analytics environments. With world-class technology enablingnever-been-seen-beforeperformance levels, NVIDIA’s HGX portfolio is arguably the most complicated systems platform ever developed by humans. This product family represents the company’s fastest growing line of business as well as its largest total available market opportunity. You will bring to bear your knowledge of system architectures and GPU technology in order to productize new GPU boards for datacenter architectures with GPU-accelerated clusters. Your responsibilities will include planning and establishing processes, defining test requirements and optimizing the production line to deliver new GPU boards. You will also be instrumental in helping the team to achieve the desired cost and quality metrics considered outstanding.

This position will be based out of Dallas, Texas.

What you will be doing:

• Use your in-depth experience with high speed networks and signals to plan and develop new diagnostic tests and debug procedures for next gen products

• Use your knowledge of system power-up and handshakes during boot to debug complex interactions between HW, FW and SW on faulty boards

• Recommend, drive and ensure compliance to DFx requirements for robust signal integrity performance as related to layout, mechanical components, assembly procedures, etc.

• Develop and deliver test specs for system level manufacturing screens for all new products to meet the required HW coverage, quality and product requirements.

• We collaborate with CM to define product assembly line, number of test stations and number of assembly fixtures, optimized for cost and efficiency.

• Craft creative solutions and WARs through volume data analysis and lab experimentation to solve meaningful yield and test problems.

• We lead optimization and continuous improvement efforts on the production screen spec definition processes to minimize waste and meet test time, yield, DPPM requirements.

• Support customer facing and quality teams during partner concerns to understand the issue and fix gaps identified in coverage.

What we need to see:

• BS or MS degree in EE/CE or equivalent experience.

• 5+ years of meaningful industry experience.

• Strong EE fundamentals, knowledgeable in digital design, signal integrity, statistics, timing analysis, fault analysis, sampling and computer architecture.

• Ways to stand out from the crowd:

• Prior board/system level electrical design experience.

• Experience with Perl, C/C++, Windows, and Linux.

What you'll be doing:

• You will be contributing to power estimation models and tools for GPU products and systems like NVIDIA DGX.

• Early GPU & System Architecture exploration with focus on energy efficiency and TCO improvements at GPU and Datacenter level.

• You will help with Performance vs Power Analysis for NVIDIA future product lineup.

• Deploy machine learning techniques to develop highly accurate power and performance models of our GPUs, CPUs, Switches, and platforms.

• Understand the workload characteristics for GenAI/HPC workloads at Datacenter Scale (multi-GPU) to drive new HW/SW features for Perf@Watt improvements.

• Modeling & analysis of cutting-edge technologies like high speed & high-density interconnects.

What we need to see:

• Pursuing a MSEE/MSCE, or equivalent experience related to Power / Performance estimation and optimization techniques.

• Knowledge of energy efficient chip design fundamentals and related tradeoffs.

• Familiarity with low power design techniques such as multi-VT, Clock gating, Power gating, and Dynamic Voltage-Frequency Scaling (DVFS).

• Understanding of processors (GPU is a plus), system-SW architectures, and their performance/power modeling techniques.

• Proficiency with Python and data analysis packages like: Pandas, NumPy, PyTorch.

• Familiarity with performance monitors/simulators used in modern processor architectures.

What you will be doing:

• Work in a combined design and verification team which develops core units within the Networking silicon.

• Build reference models, verify and simulate chip blocks/entities according to specifications and performance requirements.

• Work closely with multiple teams within organizations such as Architecture, Micro- Architecture, FW and Post-Silicon validation.

• Lead the verification effort for core switching fabrics, packet buffering architectures, and traffic management subsystems, ensuring functional correctness and performance at scale.

What we need to see:

• B.SC./ M.SC. in Computer Engineering /ElectricalEngineering/CommunicationEngineering or equivalent experience

• 8+ years of proven experience in Design Verification.

• Proven, hands-on experience verifying sophisticated network switching ASICs, with deep knowledge of core switching logic and advanced buffering architectures

• Demonstrated ability to own verification strategy and execution from the block-level through full-chip (SoC) integration.

• Sharp analytical and debugging skills with a track record of root-causing complex hardware, testbench, or software-driven issues.

• Excellent organizational and communication skills, with the ability to manage priorities and negotiate solutions across design, verification, and architecture teams.

Ways to stand out from the crowd:

• Deep experience verifying advanced traffic management (TM) and Quality of Service (QoS) features, such as complex schedulers, shapers, and congestion control mechanisms

• Proven experience building performance-focused verification environments to measure and stress test latency, throughput, and fairness

• Knowledge in SimVision and Xcelium

You will collaborate closely with researchers to design and scale agents - enabling them to reason, plan, call tools and code just like human engineers. You will work on building and maintaining the core infrastructure for deploying and running these agents in production, powering all our agentic tools and applications and ensuring their seamless and efficient performance. If you're passionate about the latest research and cutting-edge technologies shaping generative AI, this role and team offer an exciting opportunity to be at the forefront of innovation.

What we need to see:

• MS or PhD degree in Electrical Engineering, Computer Science or equivalent experience.

• Minimum of 8 years relevant experience

• We require proven theoretical knowledge of communication systems, communication theory, linear algebra, detection and estimation theory, baseband signal processing algorithms, and channel coding

• We seek deep expertise in LTE/5G NR L1 (PHY) and L2 (MAC-scheduler) algorithms design and optimizations

• Experience with wireless algorithm performance characterization and analysis

• Wireless base station design, development, and commercialization experience

• Experience building system models with Matlab, C/C++ and/or Python for algorithm design and link-level simulation

• Solid knowledge of 3GPP 5G NR standard

• Strategic context of Telecom Industry and Wireless technology evolution

Ways to stand out from the crowds:

• Research experience in AI/ML and its applications to wireless applications

• Demonstrated experience in software development for commercial RAN products

• Knowledge of SIMD computing architecture

• Background of GPU or CUDA programming

• Knowledge of Wireless Protocols and E2E Deployment Architecture

What You'll be Doing:

• Study and explore innovative techniques in bioinformatics, graph algorithms, machine learning, develop, deploy, and deliver brand-new computing software for a diverse array of bioinformatics applications used globally

• Perform detailed performance analysis and optimization to ensure optimal performance on current and next-generation GPU architectures.

• Collaborate with lighthouse clients and academic collaborators to understand their current and future challenges and provide outstanding HPC solutions.

• Collaborate closely with hardware engineering, CUDA engineering, and AI research groups to apply the latest technology to enable novel genomic analysis at scale.

What We Need to See:

• Bachelor's / Master's degree in Computer Science, a related technical field, or equivalent experience.

• 5+ years of experience n related field.

• Solid understanding of C/C++, CUDA, software design, and programming techniques.

• Experience with the design and implementation of sophisticated algorithms and data structures.

• Experience with GPU programming, debugging and performance tuning on NVIDIA GPUs.

• Knowledge and understanding of parallel programming, thread programming, concurrency control, memory management and scalability.

• Strong understanding of computer system architecture and operating systems.

Ways To Stand Out from the Crowd:

• Hands-on experience in using LLM, Graph Neural Network, Graph Transformer Network particularly those applied to genomics data.

• Strong collaborative and interpersonal skills to effectively guide and influence within a multifaceted, technical environment.

• Breaking a sophisticated problem to smaller modules that are fairly independent.