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Google Senior Silicon Test Engineering Manager United States, California, Mountain View 139442968
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, a related field, or equivalent practical experience.
- 8 years of experience in the semiconductor industry.
- 6 years of people management experience developing employees.
- 5 years of experience in IC qualification, data review, production release, System Level Testing, test time reduction and yield improvement.
- Experience with IC testing, Yield and Bin Pareto Analysis.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, related degree or equivalent practical experience.
- 10 years of Industry experience in the following areas: VLSI technologies, Product and Test Engineering, Semiconductor processing.
- Experience in System Level Testing using Advantest SLT platform.
- Experience in SERDES, PCIe, DDR and Mixed-Signal circuits such as ADC, DAC, PLL, LDO, and their performance measurements.
- Experience in Design for test (DFT) techniques and structural tests such as Scan/ATPG, JTAG and memory BIST and familiarity with testing sensors such as PVT sensors, Temp sensors, etc.
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