Job Description:In this position, you will have the opportunity:
- To design, develop and validate the Chipsets and SoC IPs for Intel latest product, focusing on DFT and Debug.
- You will have the opportunity to be trained and to gain exposure to perform SoC design work such as:- RTL logic design in System Verilog, Verilog or other Hardware description language
- Perform validation the Design for Testability (DFT) or Debugability (DFD) functionality of new architectural features of next generation designs by developing test plan, test content, coverage points or test tools
- Collaborate with our stakeholders such as Structural Design, SoC RTL,Architecture/Microarchitecture,
Qualifications:Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
You must possess a Bachelor of Engineering degree or a Master of Science degree in Electronic, Electrical or Computer Engineering
Additional qualifications include:
- Familiar with UNIX, and well-versed in Verilog or C Programming
- Knowledge in RTL integration and validation methodologies
- Possesses strong analytical and debug skills
- Ability to communicate well with counterparts and key stakeholders including cross-site partners
Shift 1 (Malaysia)Malaysia, Kulim