Defines, develops, and implements validation plans for system level integration to ensure components compatibility within the system and to meet functional, performance, and margin requirements. Reviews system requirements and provides feedback, translates them into system integration test plans, and executes them efficiently. Reviews test plans and results and supports component and system level integration from prototype to production. Applies knowledge of system level integration to identify defects and issues caused due to interactions between multiple hardware and software features. Drives defects/issues closure and provides closedloop feedback to design and architecture teams. Drives performance improvement of existing systems through troubleshooting and root cause analysis. Researches best practices in hardware and software tools for system integration and validation. Collaborates with various engineering teams such as architecture, design, silicon design, board design, firmware, and applications to improve system level bringup for next generation Intel products based on learnings from execution and defects/issues. Works with product development engineers and end customers as point of contact for platform issues.
Qualifications:Btech/Mtech candidate with a minimum of 3-5 years experience in
1. SoC power management architecture understanding
2. Windows boot/reset flow's and it's interactions with SoC
3. Understanding of ACPI spec
4. Experience in debug of defects spanning across Windows platform components including SW, HW, FW
5. Post silicon validation engineer
Experienced HireShift 1 (India)India, Bangalore