Microsoft Principal Design Verification Engineer 

United States, California, Mountain View 

123361314

Required/Minimum Qualifications

• 9+ years of related technical engineering experience
  • OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience or internship experience
  • OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience
    • OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience .

• 9+ years of experience in design verification with a track record of delivering complex CPU or SoC IP’s
• Experience with verification for multiple product cycles from definition to silicon, including writing test plans, developing tests, debugging failures and coverage sign-off in Universal Verification Methodology (UVM) or C++
• Substantial background in debugging Register Transfer Level (RTL)(Verilog) designs as well as simulation and/or emulation environments
• Scripting language such as Python or Perl

Other Requirements:

• to meet Microsoft, customer and/or government security screening requirementsarerequiredfor this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will berequiredto pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

Preferred qualifications

• Hands-on experience in Formal property verification
• Knowledge in high-speed protocols like Double Data Rate High Bandwidth Memory (DDR)/(HBM) ,Peripheral Component Interconnect Express (PCIe), Ethernet
• Experience of working on AI/ML SoCs

Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:Microsoft will accept applications for the role until September 9, 2024.

The AISiE silicon team is seeking a passionate, driven, and intellectually curious computer/electrical engineer to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge, custom IP and SoC designs that can perform complex and high-performance functions in an extremely efficient manner.

• Own or lead verification of complex flows at the System on a Chip (SOC), subsystem, or IP levels
• Plan the verification of complex design IP/SoC interacting with the architecture and design engineers to identify verification test scenarios.
• Learn about the design and interact with partner teams to define verification strategies and test plans
• Develop verification environments and run and debug simulations to drive quality
• Apply random-stimulus and coverage-based techniques to find bugs and meet test plan goals
• innovate to improve verification efficiency through methodologies or tools
• Coach and mentor others in your areas of expertise
• Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion

Embody our