דרושים ב-Marvell ב-Taiwan

What You Can Expect

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• Design, implement, and maintain large-scale HPC clusters for EDA workloads, ensuring high availability, fault tolerance, and efficient resource utilization.
• Manage, configure, and optimize LSF job scheduling systems to support diverse verification workflows.
• Develop, automate, and monitor deployment, configuration, and operational processes for EDAinfrastructure.
• Collaborate with EDA engineers and designers to refine verification flows to run optimally on the grid.
• Implement and advance CI/CD pipelines to streamline the deployment, testing, and monitoring of infrastructure and EDA flows.
• Provide troubleshooting and support for users and the infrastructure.
• Monitor infrastructure health, performance, and usage; proactively identify, resolve, and document issues.
• Ensure compliance with security bestpractices, licensemanagement, and data protection requirements.
• Contribute to architectural innovation and process improvement for future scalability and efficiency.
• Participate in incident management teams for prompt issue resolution.

What We're Looking For

• Bachelor’s or Master’s degree in Computer Science, Electrical Engineering, or related field.

Proficiency with Programming or scripting in languages such as Python, Bash, or Perl for automation and workflow development.

• Working knowledge of Linux system administration and cluster troubleshooting.

Familiarity withinfrastructure-as-code,configuration management, and monitoring , DevOps; SRE concepts; CI/CD and GitOps.

• Strong communication and collaboration skills; ability to work in cross-functional teams.
• Track record of identifying and implementing infrastructure optimizations for efficiency, throughput, and reliability.

Preferred Qualifications:

• Experience with cloud-based EDA infrastructure or hybrid HPC environments.
• Familiarity with regression management tools, and workflow automation specific to silicon verification.
• Experience with HPC cluster management, especially using LSF/Platform LSF, in a chip verification or EDA context.

Key Attributes:

• Analytical, detail-oriented, and proactive in identifying and solving technical problems.
• Passion for continuous learning and embracing new technologies and methods.
• Strong organizational abilities and commitment to documentation and process improvement.

What You Can Expect

In this role you will be responsible for driving the development and implementation of innovative signal integrity and power integrity solutions for Marvell Cloud Optics products

• Perform simulations for signal integrity analysis
• Perform hands-on high speed signal validation and analysis verification including material, de-embedding, and component characterization.
• Collaborate cross-functionally with hardware design, system architecture, silicon, and layout teams to optimize signal and power integrity design based on the simulation data and measurements.
• Power delivery modeling, simulation, and characterization for die, package, board, and voltage regulators.
• Provide implementation guidelines and feedback to silicon, package, and hardware design group for electrical signal and power integrity (crosstalk, return loss, jitter, EMI, power supply noise)
• PCB stackup review and layer assignment for High speed and PDN
• Document engineering processes and procedures

What We're Looking For

• Bachelor's degree in Engineering, or any other related field with 6+ years of experience; or a Master's degree or Ph.D. with 3+ years of experience with a proven track record of designs in high volume production.
• 5+ years of experience with HFSS simulations of PCB, packages and substrates for high speed interfaces (112G SerDes, PCIe Gen5)
• 5+ years of experience with DC IR drop and PDN analysis for boards with Cadence Sigrity and PowerDC.
• 5+ years of experience with layout tools like Allegro for design extraction
• Possesses strong fundamentals in 3D/2D EM simulation tools and transmission line theory
• Familiarity with electromagnetic compatibility (EMC) and electromagnetic interference (EMI) mitigation techniques
• Excellent communication skills, both verbal and written, to effectively collaborate with cross-functional teams and present findings to stakeholders

Expected Base Pay Range (USD)

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at

What You Can Expect

• Evaluate hardware and software features from DSP and come up with implementation plans for qualify/test

• Collaborate withvendors/manufacturersin defining and developing test plans for Optical Modules and DSP chips.

• Automate optical test plans and qualify optical modules from different vendors with different switches.

What We're Looking For

Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 5+ years of related professional experience. OR Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3+ years of experience.

• 3+ years of experience with transceivers and IEEE standards.

• 3+ years of experience developing test scripts for validation and characterization.

• 1+ years of experience working with networking protocols and technologies.

Expected Base Pay Range (USD)

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at

What You Can Expect

• Own a chip/macro layout
• Own the overall project schedule, leveraging the design lead and layout manager as needed.
• Work effectively with various groups including layout, design, backend, frontend, ESD, packaging, CAD, etc. Represent layout within the project cross-function team with leading a team, including remote design teams
• Help implement project specific guidelines and ensure team-members follow them
• Contribute to overall team through tool testing, script development, flow documentation, training, etc.
• Keep abreast of technology and tool developments and bring new ideas to the team

What We're Looking For

• Bachelor’s or Master's degree in Computer Science, Electrical Engineering or related fields and at least 5+ years of related professional experience.
• Deep understanding of layout methodology from initial chip planning to tape-out.
• Deep understanding parasitic optimizing in layout
• Experiences in advanced process technology and Fin-FET is preferable.
• Have a high level of proficiency in interpretation of CALIBRE DRC, ERC, LVS, etc. reports.
• Have a high-levelproficiency/knowledgeof Synopsys or CADENCE layout entry tools.
• Programming skills in any of the following are a plus: Skill or Ample or Perl, etc.
• Strong technical and analytical background, problem solving skills, etc.
• Fluent in English
• Team player

What You Can Expect

As an Analog/Mixed-Signal IC Design Engineer, you will be part of a key team designing highly sophisticated CMOS transceiver/SERDES products.

Responsibilitieswould include implementation and verification of circuits such as PLL, DLL, ADC, regulators, amplifiers, TX, RX, CDRs etc. to meet key performance targets and performing design verification using industry standard tools such as Spectre, MATLAB etc.

What We're Looking For

• Hands-on experience in designing mixed signal circuits including ADCs, DACs, RX, TX, PLLs, Filters, Bandgap bias circuits, regulators, and other analog circuits.
• Knowledge and experience on low power and high speed design techniques.
• Supervising Analog Custom Layout
• Experience in measuring IC performance and debug of design to correlate simulations to measurements
• Ability to apply innovative solutions to resolve complex issues.
• Strong knowledge on the deep sub-micron CMOS technologies.
• Excellent problem solving and analytical skills.
• Strong knowledge on IC design CAD tools such as Spectre, Spice, Matlab, Hsim, Verilog, etc.
• Strong team-player with solid communication skills
• Completed a PhD degree in Electrical Engineering and 3+ years of related professional experience.

Expected Base Pay Range (USD)

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at

What You Can Expect

• Device characterization
• Test program and hardware development.

What We're Looking For

• Knowledge of optical systems, modules, components, and photonics devices (lasers, detectors, modulators, transceivers, DWDM system)
• Experience with optical component characterization techniques and optical test equipment is a plus
• Experience with database (SQL), data analysis tool (JMP, R, Python, etc.), or LabView programming is a plus
• EE or Physics preferred

What You Can Expect

• Working with global teams across Argentina, Singapore, the U.S., and Europe, you will run simulations and verifications using Cadence Virtuoso, collaborating closely with the designer to refine and debug iteratively until the design meets specifications.

• Regular meetings with your paired designer ensure collaborative information sharing, integral to Marvell's commitment to partnership and teamwork.

• As a key contributor, you play a crucial role in the project lifecycle, participating in routine meetings as a technical mentor, layout team, and the broader project team.

• These interactions include updates on progress and may involve presenting specific issues or solutions encountered during the development of cutting-edge technologies.

• The dynamic nature of our work ensures continuous learning and knowledge-sharing among colleagues.

What We're Looking For

• Have fundamental understanding of electrical concepts, likely acquired through a degree in Electrical Engineering (graduate or undergraduate).

• Know how to use CAD tools to do the implementation layers, microelectronic layers in design that go beyond the schematics.

• Track record of delivering high-speed or precision analog circuits, preferably in multiple process nodes

• Have ownership through the full development cycle: floorplan, layout, verification, delivery, and support

• Assume more responsibility and ownership of tasks, from cells to functional blocks, to higher-level macros, to full interfaces or chips

• Have excellent communication skills to give status updates to your team, present to global teams in different time zones, and to share information with many different levels of personnel at Marvell