:ASIC implementation engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power planning and analysis, timing closure, signal integrity and physical...
:All aspects of front end design will be involved, with strong emphasis on flow development & synthesis/timing.BSEE and 8+ years of industry experience in flow development , synthesis constraints development...
:ASIC implementation engineer with demonstrated expertise in multiple disciplines including synthesis, design for test, floorplanning, place and route, clock methodology, power planning and analysis, timing closure, signal integrity and physical...