דרושים Soc Security Architect ב-Arm ב-United States, San Diego

• As a creative design engineer with a knowledge of subsystems and SoCs you will be part of a team developing the logic for our reconfigurable Fuse Subsystem.
• Work as part of the design team to understand the Fuse Subsystem requirements, and develop the design specifications which meet the quality, reliability, manufacturing and reconfigurable needs across multiple SoC's.
• Your key responsibilities will include crafting design micro-architecture specifications, developing the RTL, fixing bugs, running design checks and contributing to the generation of implementation constraints.
• Work closely with the verification team to review test plans and help debug design issues in addition to crafting UVM components for IP and SoC integration of the Fuse Subsystem
• As part of the design team, you will contribute to developing and enhancing the design methodologies used by the team
• Mentor and support other members of the team to enable the successful completion of project activities
• Required to work with Project Management to define plans and schedules

In addition to bringing your accomplishment of either Bachelors or Master’s degree in Computer Science or Electrical/Computer Engineering or a similar related field and 5+ years' experience working in design of complex subsystems or SoCs, you will need:

• Experience in digital hardware design for complex systems using System Verilog.
• Experience with working with analog hard IP integration, timing diagrams, BMODs
• Experience with reconfigurable IP / Subsystem design
• Experience with power and clock domain crossing
• Experience with static design checks like linting, CDC/RDC, X-propagation
• Exposure to all stages of design: initial concept, specification, implementation, testing, documentation and support
• Experience collaborating with the verification team on design quality closure
• Experience with Perl, Python or other scripting language
• Leadership, mentoring or coaching experience

• Experience with ARM-based designs and/or ARM System Architectures
• Experience with verification methodologies – UVM
• Experience with UPF, IP-XACT
• Experience leading teams or projects
• Experience developing and integrating subsystems for PCIe, UCIe, DDR/LPDDR/HBM, Ethernet etc.
• Understanding of DFT topics: RTL testability, scan insertion, OCC

We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together. These behaviors are assessed as part of the hiring process:

• Partner and customer focus
• Collaboration and communication
• Creativity and innovation
• Team and personal development
• Impact and influence
• Deliver on your promises

We offer a hybrid approach to home and office working to provide an adaptable experience for all employees. We expect some working time to be spent in office, to promote a strong collaborative environment with good team integration but are accommodating to different home working requirements.

At Arm, the SoC Interconnect Architect defines and designs innovative on-chip interconnect architectures-coherent and non-coherent-for scalable SoC platforms. You will work across markets including mobile, automotive, datacenter, networking, and IoT, contributing to production-quality silicon with top-tier performance and efficiency. Collaborating with multi-functional teams, you'll shape the interconnect infrastructure that powers next-generation SoCs.

• Architect on-chip interconnect solutions (coherent and non-coherent) across a range of silicon products.
• Collaborate with performance, power, and physical design teams to optimize interconnect fabrics.
• Develop SoC architecture using Arm product IP to meet compute performance targets.
• Define interconnect platform roadmaps in partnership with core technology teams.
• Optimize end-to-end platform solutions with software and hardware teams.
• Guide early architecture discussions with customers and partners, delivering ready-to-implement specifications.
• Support use case analysis and performance analysis.
• Drive innovation and continuous improvement in interconnect technologies.

• 8+ years' experience in on-chip interconnect architecture for various silicon products.
• 8+ years' experience with coherency protocols and hierarchical cache design.
• Proven track record working with performance, power, and physical design teams on interconnect solutions.
• Experience designing scalable SoCs across multiple sectors and process nodes.
• Knowledge in areas such as heterogeneous compute, PCIe/CXL, security, caching, memory systems, and packaging.
• Strong communication and leadership skills with executive-level influence.
• Bachelor's or Master's degree or equivalent experience in Electrical or Computer Engineering and 10+ years in semiconductor roles.

• Ability to thrive in dynamic environments with shifting priorities.
• Constructive, strategic mindset to challenge and improve status quo.
• Track record of delivering complex projects on time and to spec.

Arm is proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work collaboratively to defy ordinary and shape extraordinary!

• Partner and Customer Focus
• Collaboration and Communication
• Creativity and Innovation
• Team and Personal Development
• Impact and Influence
• Deliver on Your Promises

We work on software development methodologies, educational content, example software, and development tools. Our top priority is to ensure that software developers successfully adopt Arm technology. You will engage with developers, understand their needs, and map out either existing tool solutions or prototype new solutions that would help them achieve their project goals. You will also partner with other team members to create new tools and software to support adoption and deployment of Arm technology. We work across a variety of computing segments, including servers and cloud, mobile, laptops, and embedded systems. As part of a small and dynamic team, you will pick up a variety of engineering, support, and technical marketing tasks. The most important requirement is that you have the drive and willingness to learn and are as passionate about new technology as we are!

• Work alongside customers and partners to support, train and assist them in their use of Arm technology, sharing knowledge and working side-by-side to ensure their success
• Make Arm products better by playing the role of the user and providing feedback to product development teams
• Contribute to the Arm Learning Paths at https://learn.arm.com as a content creator and technical reviewer
• Assist in the creation of other technical marketing material such as conference talks, case studies, blogs, videos, and demos

• Bachelors (BS) or Masters (MS/MSc) in Electronics, Electrical, or Computer engineering or equivalent practical experience
• Familiarity with the Arm architecture and programming experience in Python or C++
• Creativity and ability to communicate ideas effectively, and self-motivated with strong interpersonal/collaboration skills
• Familiarly with cloud service providers, including Amazon Web Services (AWS), Microsoft Azure, and Google Cloud Platform (GCP)
• Comfortable with software development on Linux

• Ability to work in a geographically diverse and distributed team
• Genuine curiosity about new technology and solving developer problems
• Practical embedded system and microcontroller experience

• Lead electrical engineering efforts from conceptual studies through design, construction, commissioning, and operation.
• Develop and review electrical design standards and specifications, ensuring alignment with industry standard processes and Arm’s reliability goals.
• Perform detailed engineering analysis (load flow, short-circuit, and arc flash studies).
• Provide direction, coordinate with, and review the designs of external consultants and partners.
• Conduct site inspections and factory acceptance tests (FATs) for critical power infrastructure UPS, switchgear, generators, PDUs, etc.
• Provide guidance on power distribution, grounding, redundancy (N, N+1, 2N), and energy efficient strategies.
• Support operational readiness, maintenance planning, and root-cause analysis of electrical issues impacting uptime.

• Bachelor’s or Master’s degree or equivalent experience in Electrical Engineering.
• Deep technical knowledge of medium and low voltage power systems, power distribution, UPS systems, generators, battery energy storage systems (BESS), power distribution units (PDUs), and other related electrical infrastructure found within data center environments
• Proficiency with electrical modeling tools (SKM Power Tools and ETAP)
• Strong familiarity with NFPA 70 (NEC), NFPA 70E, IEEE, and international electrical codes.
• Excellent communication skills and ability to collaborate in a cross-discipline team.
• Comfortable with a fast-paced environment that is rapidly developing and changing.
• Prior experience with hyperscale data center environments or co-location facilities.

• Professional Engineering (PE) license or equivalent international certification (this position will not be stamping drawings as EOR).
• Previous experience designing for Tier III or Tier IV data centers as defined by Uptime Institute (or comparable levels of design).
• Visio, BlueBeam, AutoCAD, or other design and drafting software.

• Be part of a groundbreaking team influencing the next generation of data center systems!
• Collaborate with premier engineers and vendors to develop industry-leading AI hardware.
• Drive innovation in electrical design at scale with global impact.
• Access professional growth through sophisticated project involvement and multidisciplinary teamwork.
• Join a company committed to diversity and inclusion, where your work matters and drives global progress!

As a member/lead of SOC emulation team you will be involved in:

• Supporting multiple Emulation environments using the latest emulation techniques.
• Building early SoC platforms to facilitate performance/power analysis and debug. Able to handle/modify RTL and stitch together SoCs with standardized interfaces from scratch for bare-metal and validation OS based bringups. Collaboration with design teams to ensure the production of clean RTL code.
• Developing system level testbenches to implement performance and power benchmarks, simpoints and use cases in emulation platform. Integrate observation options to assemble and debug performance/power studies, correlate with pre-Si simulation/post-Si, lead larger implementation teams for emulation at later implementation phases and work with post-Si teams for analysis/tuning. Help drive innovation in model building and debugging methodologies.
• Collaborate with SoC Architecture team to create testplans covering all performance and power metrics for the product. Define flexible/reduced SoC configurations allowing reduction in simulation and emulation capacities, while providing accurate performance estimates. Collaborate with emulation vendors to define distributed systems to split huge SOC netlist between multiple emulation boxes.

• Experience (+10 years) in SoC Performance verification and emulation environment bringup in the semiconductor industry.
• A background in Electrical Engineering, Computer Engineering, or Computer Science with an expertise in computer architecture and microarchitecture.
• Proficient in RTL (SystemVerilog, Verilog, VHDL), C/C++ for bare metal code, system validation using OS, test code development, strong scripting capabilities, particularly in Python, TCL, and shell scripting.
• Excellent communication, and interpersonal skills with ability to convey effectively complicated solutions.
• Drive early and detailed performance/power analysis as an experienced Emulation Architect at Arm, focusing on diverse silicon platforms

• Experience in developing, building, and releasing large multi-billion gate hardware emulation models. In-depth knowledge of key hardware emulation vendor solutions for emulation and prototyping.
• Experience working with design and software teams on design verification tests, PPA workloads, and software workloads.

We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to surpass ordinary and shape outstanding!

• Partner and customer focus
• Collaboration and communication
• Creativity and innovation
• Team and personal development
• Impact and influence
• Deliver on your promises

This exciting position, will offer you the opportunity to work on the newest technology in a collaborative environment to:

• Develop in depth understanding of current and future ML workload on ARM compute platforms with a focus on their PPA (performance, power, and area).
• Architecture exploration necessitates the joint development of hardware, software, and algorithms. This role serves as the ML Algorithm authorities within the exploration process. This includes algorithm innovation and prototyping to drive and validate architectural features
• Develop hardware aware optimization algorithm that can make state-of-the art networks on Arm platforms including CPU/GPU/NPUs.

• 3+ years working in a ML Algorithm Development and/or Optimization environment
• A Master or PhD degree in Computer Engineering, Electrical Engineering, Computer Science or other related technical fields
• Proficient in computer architecture, basic knowledge of HW and SW design
• Developing and working with large software systems in programming languages like Python
• Knowledge of state-of-the-art deep learning libraries such as Tensorflow and Pytorch
• Training large deep learning models on powerful GPU-based systems

• ML Model Optimization techniques targeted for resource constrained ARM edge compute platforms.

With a history that spans more than 30 years of innovation and discovery, Arm has become a global computing platform. You will have relevantly contributed to pushing the thresholds of ML performance across the industry.

As a verification engineer, you will make a difference by influencing the verification strategy and methodology, taking ownership of complex work packages and driving them to success.

• Meticulous attention to detail, ensuring high-quality verification that minimizes bug escapes.
• Shown experience in block-level verification using UVM or similar methodologies.
• Strong knowledge of coverage driven verification for complex designs.
• Proficient in specifying, creating, and debugging SystemVerilog/UVM constrained-random testbenches.
• Skilled in planning verification tasks and producing realistic effort and time estimates.

• Experience in working with requirements definition and management.
• Formal verification experience.
• Proficiency in developing C/C++ models of a microarchitecture.
• Familiarity with Arm architecture and AMBA bus protocols.
• Experience with CI platforms and version control tools.
• Practical knowledge of machine learning and neural networks.