דרושים Serdes Micro Architect ב-אפל ב-United States, San Diego

Apple Senior SerDes System Validation Engineer United States, California, San Diego

Limitless High-tech career opportunities - Expoint

שיתוף

MSEE with 10+ years relevant experience or PhD with 7+ years relevant experience. • Ownership of SerDes system bring-up, validation and debug. This will involve a SerDes bring up in...

Lead system validation of mixed-signal SerDes IPIf you have strong fundamentals and a track record of tackling technical challenges.If you like to be tuned to the bigger-picture while diving deeply into the details to innovate and solve problems.If you care about society and have demonstrated leadership skills through commitment to great causes.

• Very knowledgeable about and experienced with common high-speed SerDes protocols (e.g., PCIe, USB, UCIe, OIF, etc.)• Very knowledgeable in system bring-up of high-speed serial links, lab testing, and defining equipment needs• Very knowledgeable in scripting (e.g. python, C, Matlab) for automation of validation efforts. Experience with system level S/W setup is a plus• Experience in mixed-signal circuit pre-silicon verification and ability to closely work with circuit design team • Knowledge of DFT to aid in the system validation• Experience in leading mixed-signal SerDes system validation• Experience with silicon bring-up, debug and production ramp• Knowledge of SerDes design and architecture including CDR and equalization• Knowledge of with Tx/Rx equalization techniques and adaptation • Knowledge of link jitter budget for high-speed serial links and key block level requirements• Knowledge of ADC based links and equalization techniques• Familiarity with PCB design and specifications• Strong communication, teamwork and problem solving skills• Proven track record of delivering under difficult debug and validation scenariosExperience in the following areas is desirable:• Able to think outside of the box and come up with creative solutions for system validation• Knowledge of system level considerations e.g. ESD requirements

MSEE with 10+ years relevant experience or PhD with 7+ years relevant experience.

• Ownership of SerDes system bring-up, validation and debug. This will involve a SerDes bring up in system environment, verifying basic operations, analyzing robustness and margins in system.
• Work with design teams to understand the architecture and define DFT needs to help enhance testability and first time silicon success.
• Be involved in mixed-signal verification tasks to better understand the SerDes operation and interaction with higher level control logic.

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

משרות נוספות שיכולות לעניין אותך

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Apple SerDes Micro Architect United States, California, San Diego

שיתוף

BS degree in technical discipline with minimum 10 years of relevant experience. Experience leading the definition of high-speed SERDES receiver, transmitter, and clocking blocks. Deep understanding of adaptation and optimization...

You will define the Micro Architecture of analog mixed-signal IPs with emphasis on SERDES design. You will review firmware code, analog and digital circuits and will verify that the design meets performance requirements. You will work with silicon evaluation and design verification teams to define expected behavior. You would lead the debug effort in system bring up and factory test. You will work with signal integrity engineers to determine system requirements.

BS degree in technical discipline with minimum 10 years of relevant experience.

Experience leading the definition of high-speed SERDES receiver, transmitter, and clocking blocks
Deep understanding of adaptation and optimization algorithms
Deep understanding of communications and information theory
Proficiency in equalizers, timing recovery and system identification
Proficiency in DSP concepts and applications
Familiarity with mixed-signal modeling in Python/MATLAB/C/C++
Experience in system design and performance tradeoff
Familiarity with simulation tools for analog, digital, and/ or mixed-signal circuits
Familiarity with Machine Learning concepts
Experience in firmware or embedded software development is a plus

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

משרות נוספות שיכולות לעניין אותך

Apple SerDes Senior Circuit Design Engineer United States, California, San Diego

שיתוף

BSEE with 10+ years of proven experience. The ideal candidate should have deep understanding of analog mixed-signal design with experience in high-speed serial links. Solid understanding and experience of designing...

You will work on the development of high-performance and high-speed AMS circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation and low-jitter distribution, phase interpolator, DLL, VCO, LDO) with best in class power, performance, and area (PPA). You will be leading discussions with cross-functional teams (e.g., architecture, SIPI, packaging, board design, DFT, ESD) to create and drive block-level specifications, mixed-signal implementations and behavioral modeling. You will closely work with SOC teams to deliver IP views and make sure they meet the quality standards. While developing these complex IPs, on regular basis you will interact with your peers/management to communicate progress, discuss new ideas and drive new implementations/concepts making it a rewarding and growth-oriented work environment.

BSEE with 10+ years of proven experience.

The ideal candidate should have deep understanding of analog mixed-signal design with experience in high-speed serial links.
Solid understanding and experience of designing analog mixed signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters
Solid understanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques
Solid understanding and experience with digitally assisted analog design concepts (e.g. background calibrations, LMS based adaptive loops)
Proven track record of working with system and architecture teams to drive block-level and IP requirements
Proven track record of working with large teams and guiding junior engineers
Experience with high speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.) with solid understanding of digital design concepts
Experience and solid understanding of Tx/Rx equalization techniques and circuits (e.g. CTLE, DFE, de-emphasis) for 64-100+ Gbps NRZ and PAM applications
Experience with EQ adaptation methods and circuit interactions to improve PPA
Solid understanding of CDR architectures and implementations
Experience in Analog Mixed Signal circuit modeling and performance evaluation (e.g. SystemVerilog, Matlab, Python, VerilogAMS)
Hands-on experience to drive lab testing, debug and data analysis
Hands-on experience in advanced CMOS technologies, design with FinFet technology
Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization
Experience in the following areas is a plus
Concepts of timing closure and related industry tools (e.g., Nanotime, Primetime)
Concepts of IP delivery and quality checks
Knowledge of common high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) is highly desired
Skills in scripting and automation to enhance efficiency are highly desirable

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

משרות נוספות שיכולות לעניין אותך

Apple SerDes Micro Architect United States, California, San Diego

שיתוף

BS degree in technical discipline with minimum 3 years of relevant experience. Experience leading the definition of high-speed SERDES receiver, transmitter, and clocking blocks. Deep understanding of adaptation and optimization...

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

BS degree in technical discipline with minimum 3 years of relevant experience.

Experience leading the definition of high-speed SERDES receiver, transmitter, and clocking blocks
Deep understanding of adaptation and optimization algorithms
Deep understanding of communications and information theory
Proficiency in equalizers, timing recovery and system identification
Proficiency in DSP concepts and applications
Familiarity with mixed-signal modeling in Python/MATLAB/C/C++
Experience in system design and performance tradeoff
Familiarity with simulation tools for analog, digital, and/ or mixed-signal circuits
Familiarity with Machine Learning concepts
Experience in firmware or embedded software development is a plus

משרות נוספות שיכולות לעניין אותך

24.08.2025

Apple Display Electrical Hardware Architect / Engineer United States, California, San Diego

שיתוף

Bachelor’s degree in Engineering (BS) and a minimum of three years of relevant industry experience. Experience in electrical‐engineering fundamentals (analog, mixed‑signal, digital design, power electronics, etc.). Experience with complex system...

We are seeking an engineer to architect the next‑generation display technology for Apple products. In this unique role, you will have first‑hand access to novel display innovations and be responsible for designing display sub‑systems that integrate seamlessly into Apple devices. You will spearhead the development of groundbreaking display solutions—inventing original concepts that redefine visual performance, power efficiency, and system‑level integration. Your work will ensure harmonious interaction between the display and critical subsystems such as touch, power supply, timing‑control, and row‑ and column‑driver ICs.This role demands strong collaboration with cross‑functional teams to translate theoretical insights into manufacturable hardware. You will define test plans and validation methodologies for both pre‑silicon and post‑silicon phases and provide technical leadership throughout the development cycle.

Investigate new technologies for next‑generation display products.Perform detailed engineering analyses of silicon and system requirements.Design display architectures and prototypes, including bring‑up and validation.Deliver high‑quality electrical hardware architecture specifications for display systems.Prepare presentations for cross‑functional teams or leadership to review designs and progress.

Bachelor’s degree in Engineering (BS) and a minimum of three years of relevant industry experience
Experience in electrical‐engineering fundamentals (analog, mixed‑signal, digital design, power electronics, etc.)
Experience with complex system design and/or analog and mixed‑signal circuit design

Master’s or Ph.D. in a relevant field of study
Lab experience, including silicon debugging, IC characterization, and system validation
Strong mathematical and analytical skills
Prior knowledge of display and/or touch hardware and technologies
Previous experience in system modeling and integration
Expert knowledge of MATLAB and/or circuit‑simulation tools
Excellent verbal and written communication skills
Strong leadership skills to coordinate efforts across Apple teams and external vendors
Attention to detail to ensure error-free and short time to market products

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

משרות נוספות שיכולות לעניין אותך

24.08.2025

Apple Display Power Silicon Architect United States, California, San Diego

שיתוף

Minimum of B.S. Degree in EE or related field and 10 years of relevant industry experience. Experience in power supply design. Experience with DC-DC IC architectures, magnetic design, PCB layout...

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Minimum of B.S. Degree in EE or related field and 10 years of relevant industry experience.
Experience in power supply design
Experience with DC-DC IC architectures, magnetic design, PCB layout and/or state-of the art techniques for integration and efficiency optimizations.
Must be able to use Spice and/or behavioral simulation tools, Matlab, MathCad, Cadence and Excel mathematical analysis.

M.S. in EE in power electronics. Ph.D preferred.
Must have deep knowledge of silicon physics and silicon processes including IC packaging technologies and DC-DC power conversion topologies including controls loop.
Strong analytical/problem solving skills and ability to guide critical decisions
Must possess good understanding of thermals, mechanical and packaging challenges.
Must possess knowledge of high volume manufacturing technologies and production variance.
Must be familiar with challenges of mixed-signal ICs design. Must posses knowledge and experience with both analog and digital design with an emphasis on analog. Must know the complete methodology of mixed signal IC from a concept to a MP.
Must be highly motivated, self-starter with innovation, integrity and attention to details.
Ability to work well with cross-functional teams is extremely important
Proven track record of working in fast paced innovative work environment
Ideal candidate is with work experience in power management semiconductor/silicon companies and computer industry.
Must be willing to occasionally travel overseas as needed.

משרות נוספות שיכולות לעניין אותך

08.06.2025

Apple RF Requirements Standards Architect United States, California, San Diego

שיתוף

BS + 10 years of relevant industry experience is required. In-depth knowledge of cellular radio standards (GSM, UMTS, LTE, NR), regulatory requirements, and carrier requirements. Relevant experience in RF system...

In this role you will be at the innovative center of the RF system engineering and architecture group responsible for defining the evolution of RF systems toward emerging new spectrum, 6th generation cellular technologies, and for introducing practical solutions for radio access technology into 3GPP and other relevant standardization bodies.

In this role you will:- Research emerging new spectrum policy, use cases, and trends.- Analyze RF coexistence associated with emerging spectrum regulation.- Design RF architecture and requirements for devices operating in next generation (5G-advanced and 6G) radio access networks.- Develop innovative cellular system solutions and define RF requirements for emerging vertical use cases with 6G radios.- Participate in 3GPP RAN4 and other relevant standardization bodies.- Contribute to the development of the 6G cellular system, working closely with physical layer design and standardization teams.

BS + 10 years of relevant industry experience is required.
In-depth knowledge of cellular radio standards (GSM, UMTS, LTE, NR), regulatory requirements, and carrier requirements.
Relevant experience in RF system design for emerging vertical applications of cellular specifications.
In-depth knowledge with RF architecture and requirements.
Strong understanding of antenna array theory and associated measurement methods.
We are seeking an engineer with a background of 3GPP RAN working group participation (particularly RAN4).
Strong analytical and interpersonal skills with an ability to thrive in a multi-functional environment.

7+ years of relevant experience in RF including direct expertise in transmitter, receiver architectures, and system design.
We consider your knowledge of connectivity standards (IEEE 802.11ax, IEEE 802.11ax/ay/az/be) a plus.
We value your experience with very high frequencies (GHz, THz).
We consider your knowledge of RF coexistence of diverse systems (e.g. active and passive systems) and spectrum policy a huge plus.

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

AppleSenior SerDes System Validation Engineer

משרות נוספות שיכולות לעניין אותך

1 2 3 4 5

United States, California, San Diego

427750650

25.08.2025

שיתוף

MSEE with 10+ years relevant experience or PhD with 7+ years relevant experience. • Ownership of SerDes system bring-up, validation and debug. This will involve a SerDes bring up in...

תיאור:

MSEE with 10+ years relevant experience or PhD with 7+ years relevant experience.

• Ownership of SerDes system bring-up, validation and debug. This will involve a SerDes bring up in system environment, verifying basic operations, analyzing robustness and margins in system.
• Work with design teams to understand the architecture and define DFT needs to help enhance testability and first time silicon success.
• Be involved in mixed-signal verification tasks to better understand the SerDes operation and interaction with higher level control logic.

Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.