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Cpu Power Management Rtl Architect jobs at Apple in United States, California
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406 jobs found
26.08.2025
A
Apple Power Integrity Engineer United States, California
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BS and 3+years of relevant industry experience. M.S and or Ph.D. with background in Electromagnetism and Power/Signal Integrity. Experience with Python coding for automation development is highly preferred. Experience in...
Description:
- Power delivery modeling, simulation, and characterization for die, package, board, and Voltage Regulator - Work with on-die/package/board power delivery for current and future generations - Define the power architecture and design solution space for the target system - Provide implementation guidelines and feedback to silicon, package, and system design group - Perform feasibility study, design verification, and sign off - Perform model to hardware correlation on component and product/system level
- BS and 3+years of relevant industry experience
- M.S and or Ph.D. with background in Electromagnetism and Power/Signal Integrity
- Experience with Python coding for automation development is highly preferred
- Experience in PI/SI methodology development, PDN modeling from system to die, and lab correlation/validation
- Experience in design and analysis of product power supply solution
- Understanding of power supply architecture covering voltage regulator technologies, PCB and package design trends and trade-offs, and chip supply design including low-power design methodologies
- Deep understanding of Voltage Regulator design principles and electrical performance in the system environment
- Good knowledge in 3D/2D EM simulation tools, electromagnetic and transmission line theory
- Familiar with lab equipment including but not limited to VNA, real-time scope, spectrum analyzer
- Ability to work and communicate efficiently in a multi-functional team
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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26.08.2025
A
Apple GPU RTL Design Engineer United States, California, San Diego
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We are looking for candidates with a BS and a minimum of 10 years relevant industry experience. Strong background in GPU, CPU, or SIMD architectures. Logic design, with expert knowledge...
Description:
As a GPU Design Engineer, you will be responsible for delivering high-quality, low-power graphics IP that meets our performance, timing, and area goals. You will explore design trade-offs, while exercising rigorous design principles. Additionally, you will be required to understand and contribute to pioneering micro-architectural specifications in order to design best-in-class GPUs. To accomplish this, you will collaborate closely with multi-functional teams in architecture, validation, modeling, and physical design.
- We are looking for candidates with a BS and a minimum of 10 years relevant industry experience.
- Strong background in GPU, CPU, or SIMD architectures.
- Logic design, with expert knowledge of low-power techniques and timing optimizations.
- Expert knowledge in System Verilog HDL.
- Ability to drive bring up and debug of complex designs.
- Ability to work well in a team in order to be productive under aggressive product schedules.
- We believe that there is power in teams working together so you must have strong communication, influence, and negotiation skills.
- Experience designing GPU Schedulers, Execution Units, Texture/Pixel Units, or Caches.
- Detailed understanding of synthesis tools, timing analysis, floor planning, and the PNR flow.
- Experience in hardware performance analysis.
- Experience with scripting languages such as Python, Ruby, or Perl.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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26.08.2025
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Apple Reliability Engineer Lead – Custom Silicon Management United States, California, San Diego
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BS degree and 10 years of industry experience. Experience in JEDEC reliability and quality related standards, ISO, and the science behind them. Travel is required for this role. You will...
Description:
•You will drive requirements and execution of products, process and package qualification and reliability stress tests conditions and configurations from design stage all the way to successful qualification completion.•Drive and review Design for Reliability and Design for Test to ensure stress-ability and testability.•Lead all aspects of and ensure adequate preparation for qualification including such as corner skew material, BIB/Socket, waveform, electrical bias, thermal effect, lifetime estimation.•Implement POR of process flows, workmanship standards and supervise product performance.•Perform FAI (First Article Inspection) to ensure critical goals are reviewed before engineering, pre-production and production release for Product manufacturing.•Drive investigation and resolution on qualification fallouts and product and process nonconformance of MRB, RMA events through means of FA, CAR, 8D, and reporting.•Support PCN or ECN activities.•Conduct supplier audits when needed. •Assess/perform yield analysis and correlation analysis for all levels of test including Pareto building, statistics, etc. •Drive/guide suppliers for improvement as needed.
- BS degree and 10 years of industry experience.
- Experience in JEDEC reliability and quality related standards, ISO, and the science behind them.
- Travel is required for this role.
- You will have 15+ years of semiconductor engineering in the Reliability and/or Quality/Product Engineering role from multinational companies.
- Experience with silicon product level reliability qualification and lifetime behavior model.
- Prior experience defining hardware setups and equipment for life, environmental, ESD, Latch-Up and other tests.
- Validated auditing of supplier sites, materials and processes.
- Experience driving suppliers in the areas of silicon Fab process / packaging / assembly, test, ongoing reliability monitoring, post-production qualification.
- Familiar with process flows, specifications, and supervising supplier performance (process Cpk, yield, qualification report, etc.)
- Possess knowledge on practice of FAI to validate the work suppliers are doing prior to production stage.
- Outstanding communication skills.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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26.08.2025
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Apple Senior Manager Engineering Program Management United States, California, Sunnyvale
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5+ Years experience leading and developing a team. Confirmed expertise in software development project management. Demonstrated ability in leading and developing team. Experience at end to end project delivery; building...
Description:
You will lead an EPM team responsible for driving technical issue and other logistics resolutions to enable timely delivery of network service into production. You will engage with multi-functional EPMs to coordinate, align and build or support broad programs while managing expectations of various stakeholders. Drive a highly focussed issue reporting and communication of program risks and status
- 5+ Years experience leading and developing a team
- Confirmed expertise in software development project management
- Demonstrated ability in leading and developing team
- Experience at end to end project delivery; building roadmaps through to operational sustainability
- Strong facilitation skills (requirements sessions, design meetings, progress and status meetings)
- 10 + years proven experience in software development project management for Site Reliability Engineering / DevOps / Infrastructure domains
- Exceptional organizational management, project management, and technical savvy
- Experience leading Cloud Infrastructure programs.
- Experience in networking domain is a big plus
- Experience at prioritizing features, and technical road maps
- Proficiency and experience in delivering large scale infrastructure projects
- Self-motivated and proactive with shown creative and critical thinking capabilities
- Strong analytical and problem-solving skills
- Strong verbal and written communication skills to represent at all levels of the organization
- Ability to handle multiple simultaneous end to end infrastructure, technical projects and partner community comprising of various engineering teams and their partners
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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26.08.2025
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Apple CPU Physical Electrical Analysis Engineer United States, California
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Minimum BS with 10+ years of relevant industry experience. Experience with PNR design implementation and STA. Knowledge of computer architecture and RISC pipelines with experience working on compute-oriented block implementation...
Description:
As a CPU Physical Electrical Analysis Engineer, you will be driving the block and top level design of power-grid and analysis of high performance compute blocks in the EMIR/SIGEM/Reliability space.
• Drive block and top-level EMIR/electrical verification closure• Work on power grid design, construction, and implementation using existing infrastructures and where necessary, creating custom solutions in PNR tool environment• Work multi-functionally with CAD/EDA vendors to ensure fidelity of analysis results; with methodology teams to cover unique use cases; with implementation teams to drive design and sign-off closure, and with the SoC level teams to meet IP delivery quality and schedule
- Minimum BS with 10+ years of relevant industry experience
- Experience with PNR design implementation and STA
- Knowledge of computer architecture and RISC pipelines with experience working on compute-oriented block implementation (GPU / Neural network / CPU PNR blocks)
- Experience in TCL-based automation with PNR & STA tools
- Familiarity with industry standard tools such as Siemens, Ansys Redhawk, Seascape, or Cadence Voltus
- Working knowledge of C/C++
- Ability to write and maintain scripts in TCL, Python, or Perl
- Experience with data analysis techniques using Python or Perl
- Experience with matplotlib / pandas or similar data analytics packages
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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25.08.2025
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Apple Machine Learning Compiler Architect United States, California, Sunnyvale
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In-depth working knowledge of compiler architecture, front-end and middle-end optimizations, scheduling, register allocation, back-end code generation. Experience with IR and/or programming language design, esp. experience with MLIR and LLVM. High...
Description:
We develop compiler technology to accelerate deep learning applications for Apple products. In this role, you will be empowered to:
- In-depth working knowledge of compiler architecture, front-end and middle-end optimizations, scheduling, register allocation, back-end code generation
- Experience with IR and/or programming language design, esp. experience with MLIR and LLVM
- High level C++ programming expertise and experience working in a large and complex software stack with a consistent track record of building high quality production software
- Bachelor's degree in Computer Science, Computer Engineering or equivalent and a minimum of 20 years of relevant industry experience
- Experience with compiling for distributed and parallel execution environment including distributed execution, shared memory, synchronization, etc.
- Experience with neural networks inference on dedicated SoC or GPU is highly desired
- Understanding of JIT techniques for dynamic optimization and execution of code
- Ability to analyze and optimize program execution paths
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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25.08.2025
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Apple CPU Gate Level Synthesis Engineer United States, California
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Minimum BS and 10+ years of relevant industry experience. Experience in digital logic design, RTL synthesis, and physical design. The ideal candidate should possess CPU implementation experience. Proficiency in scripting...
Description:
As a CPU Gate Level Synthesis Engineer, you will drive the early-stage development of high-performance, low-power digital designs for cutting-edge high-performance CPUs. This role involves running RTL to gate level synthesis and finding opportunities to optimize timing, power, and area for micro-architectural features. You will collaborate with cross-functional teams to implement synthesis methodologies, constraint development, DFT integration, RTL optimization and power analysis. Responsibilities include but are not limited to:• Early RTL health assessment to detect potential timing/gate-depth issues and collaborating with the RTL & physical design teams in exploring solutions• Early stage power estimation and validation for new micro-architectural features• Enhancing synthesis flows for good correlation to post-route to ensure high fidelity of synthesis-based feedback• Work closely with DFT teams to ensure seamless integration of scan chain, ATPG, and MBIST into the synthesis flow• Partner with timing team to enable constraints generation at top levels• Debug and resolve timing, power, and area issues, ensuring efficient and scalable designs• Track and analyze PPA trends through project cycle
- Minimum BS and 10+ years of relevant industry experience
- Experience in digital logic design, RTL synthesis, and physical design
- The ideal candidate should possess CPU implementation experience
- Proficiency in scripting languages (Tcl, Perl, Python) for automation and flow optimization
- Strong problem-solving, debugging, and collaboration skills in a fast-paced environment
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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These jobs might be a good fit
BS and 3+years of relevant industry experience. M.S and or Ph.D. with background in Electromagnetism and Power/Signal Integrity. Experience with Python coding for automation development is highly preferred. Experience in...
Description:
- Power delivery modeling, simulation, and characterization for die, package, board, and Voltage Regulator - Work with on-die/package/board power delivery for current and future generations - Define the power architecture and design solution space for the target system - Provide implementation guidelines and feedback to silicon, package, and system design group - Perform feasibility study, design verification, and sign off - Perform model to hardware correlation on component and product/system level
- BS and 3+years of relevant industry experience
- M.S and or Ph.D. with background in Electromagnetism and Power/Signal Integrity
- Experience with Python coding for automation development is highly preferred
- Experience in PI/SI methodology development, PDN modeling from system to die, and lab correlation/validation
- Experience in design and analysis of product power supply solution
- Understanding of power supply architecture covering voltage regulator technologies, PCB and package design trends and trade-offs, and chip supply design including low-power design methodologies
- Deep understanding of Voltage Regulator design principles and electrical performance in the system environment
- Good knowledge in 3D/2D EM simulation tools, electromagnetic and transmission line theory
- Familiar with lab equipment including but not limited to VNA, real-time scope, spectrum analyzer
- Ability to work and communicate efficiently in a multi-functional team
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Show more
These jobs might be a good fit
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