Experience with ASIC power analysis and optimization
Good understanding of power impact at architecture, logic design, and circuit levels.
Understanding of SOC design flow and methodology.
Strong interpersonal skills are a pre-requisite as you will collaborate with many different groups
Preferred skills and experience:
MS.c in Electrical Engineering
Silicon power measurement experience
Familiarity multimedia data processing
Coding in Python
Familiarity with Verilog and System Verilog
Description
In this highly visible role, you will be responsible for SOC power simulation and power modeling, SOC use case power analysis, and drive the future SOC power optimization.
Education & Experience
BS.c in EE / MS.c in EE or Computer Science/ Electrical Engineering required.