דרושים Physical Layer Hardware Architecture Engineer ב-אנבידיה ב-Israel, Tel Aviv District, Tel Aviv-yafo

What you'll be doing:

• Own the responsibility for delivering Networking features and their verification aspects.

• Define, develop and maintain verification infrastructure and regression tests suites - make test suites robust, maintainable and easy portable.

• Work with continuous integration system, regression tools, automate builds, run test suites and analyzing results.

• Innovate! Bring NVIDIA product to next quality level

What we need to see:

• B.Sc. in Computer Science / Computer Engineering / Electrical Engineering / Communication Engineering

• 5+ year of relevant experience working with established brands

• Experience with Verification and Automation

• Programming Knowledge in C and C ++, object-oriented OOP

• Knowledge in Linux

• Creative, motivated and value-driven person

Ways to stand out from the crowd:

• Background with C/C++ as well as Git

• Experience with python

• Experience with Networking applications and protocols

• Background with CI methodology & tools (Gerrit, Jenkins etc.)

What you will be doing:

• Work closely with the architecture and different software and hardware design teams.

• Implement new features for NVIDIA NIC and Switch firmware.

• Develop verification tests for advanced features in a highly complex and sophisticated Firmware testing environment.

• Collaborate with multi-functional teams including chip design, board designers, Silicon, SW and program managers to debug any FW/validation issues.

• Heavily involved with the early modeling and simulation required to produce our outstanding products including schematic and layout reviews on next generation board designs.

What we need to see:

• Bachelor's or master's Degree in Electrical/Computer Engineering, or equivalent experience.

• Prior 2+ years of experience in Firmware.

• Strong C/C++ and OOP capabilities.

• Excellent Data analysis, debugging and problem-solving skills.

• Strong understanding of digital design, computer architecture, Linux, drivers and CPU/GPU/SOC architecture.

• Familiar with the fundamentals of Linux scripting languages and python hands-on.

• Strong analytical, debugging and problem solving skills.

• Motivated and independent with strong communication skills.

Ways to stand out from the crowd:

• Coding and automation skills in scripting languages like Python.

• Experience with RISCV architecture and verification.

• Ability to multitask and prioritize in a fast paced environment.

• Strong interpersonal and communication skills and ability to work effectively across different teams

• Hands-on lab experience with board bringup, lab debug and lab tools (oscilloscopes, multimeters, logic analyzers).

What you'll be doing:

• In this position, you will be responsible for verification of the DFT design, architecture and micro-architecture using sophisticated verification methodologies.

• As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.

• Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.

What we need to see:

• BSc. in Electrical Engineering or Computer engineering.

• Good understanding of RTL design (Verilog)

• Strong debugging, problem solving and analytical skills.

• Excellent communication and social skills.

• Ability to work in a geographically diverse team environment.

• Self motivated, independent and target oriented.

Ways to stand out from the crowd:

• Previous experience in dft and/or verification

• Experience in developing verification environments and random based verification for unit level and system level using verification tools (simulation tools, Verilog, debug tools like Simvision/Debussy)

• Background with SV/Specman and Python

with opportunities for growth, learning, and leadership.

Join one of the most desirable employers in the tech industry and help us build the next generation of GPU networking silicon.

What you’ll be doing:

• Drive chip-level integration for advanced GPU networking silicon projects.

• Collaborate with architecture, RTL design, verification, FV and physical design teams to ensure seamless integration and optimal performance.

• Develop and maintain integration flows, methodologies, and automation to improve efficiency and quality.

• Perform RTL synthesis, timing analysis, and support verification and post-silicon activities.

• Handle Clock Domain Crossing (CDC) checks and ensure robust design practices.

• Work closely with multiple teams across architecture, micro-architecture, backend, and firmware to deliver high-quality silicon.

• Contribute to state-of-the-art technologies delivering industry-leading throughput and ultra-low latency for GPU networking solutions.

What we need to see:

• B.Sc. in Electrical or Computer Engineering

• 5+ years of experience in chip design, integration, RTL design and/or verification

• Strong knowledge of Verilog /System Verilog and RTL design principles.

• Hands-on experience with CDC analysis, synthesis, and timing closure.

• Familiarity with EDA tools (Synopsys, Cadence, Mentor) and scripting languages (Python, TCL).

• Excellent communication skills and ability to work in a collaborative, fast-paced environment.

Ways to stand out from the crowd:

• Knowledge of network protocols, HPC, or distributed systems – an advantage.

What you'll be doing:

• In this position, you will be responsible for verification of the DFT design, architecture and micro-architecture using sophisticated verification methodologies.
• As a member of our DFT verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), execute test/coverage plans, and verify the correctness of the design.
• Collaborate with architects, designers, emulation, production testing and silicon verification teams to accomplish your tasks.

What we need to see:

• BSc. in Electrical Engineering or Computer engineering.
• Good understanding of RTL design (Verilog)
• Strong debugging, problem solving and analytical skills.
• Excellent communication and social skills.
• Ability to work in a geographically diverse team environment.
• Self motivated, independent and target oriented.

Ways to stand out from the crowd:

• Previous experience in dft and/or verification
• Experience in developing verification environments and random based verification for unit level and system level using verification tools (simulation tools, Verilog, debug tools like Simvision/Debussy)
• Background with SV/Specman and Python

What you'll be doing:

• Physical design of blocks according to specifications under challenging constraints targeting for the best power, area, and performance.

• Be exposed and work on a variety of exciting designs. Resolving complex timing and congestion problems.

• Daily work involves all aspects of physical design chip development (RTL2GDS) - synthesis, power and clock distribution, place and route, timing closure, power and noise analysis, and physical verification.

• Taking part in flow development.

What we need to see:

• B.SC./ M.SC. in Electrical Engineering/Computer Engineering or equivalent experience.

• Knowledge in physical design flows and methodologies (PNR, STA, physical verification).

• Deep understanding of all aspects of Physical construction and Integration.

• Knowledge in Physical Design Verification methodology LVS/DRC.

• Familiarity with physical design EDA tools (such as Synopsys, Cadence, etc.).

• 2-3 years of relevant experience

• Great teammate.

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people.

What will you be doing:

• You will bring together and understand internal and external customer requirements to improve AI cluster resiliency and design AIOps-based solutions that address these needs.

• Develop automated workflows for issue detection and root cause analysis and closely collaborate with operators to debug sophisticated, full-stack AI cluster problems. We will bring to bear the findings for product improvements!

• Deliver compelling technical presentations and lead hands-on demos or training. You'll also handle evaluation deployments (POC/POV) and ensure smooth, reliable installations by staying engaged and encouraging throughout the customer journey.

What we need to see:

• Bachelor of Science or equivalent experience

• 8+ years of networking experience in enterprise or service provider environments, with strong hands-on expertise in routing and switching.

• Proficient in scripting and automation using Python or similar languages, with strong Linux expertise.

• Proven experience working directly with customers to resolve issues and ensure success in Systems Engineer or SRE roles.

• Exceptional oral, written, and presentation skills for clearly communicating complex technical topics.

• Demonstrated ability to collaborate effectively across teams, partnering with operations, engineering, and product development

Ways to stand out from the crowd:

• Experience with data center infrastructure and cloud architectures

• Background in network performance monitoring or observability

• Previous experience working at a technological start-up