Qualcomm IO/Verilog Characterization Modeling Engineer Hsinchu 

Taiwan, Hsinchu 

520476292

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

Job Responsibilities:

• Write RTL models in Verilog for the different flavors of IOs.

• Build verification plan and verify the design including both behavioral models and transistor level implementation.

• Experience in System Verilog assertions(SVA), Power aware verification and formal verification is necessary.

• Debug issues at IP level and SoC level.

• Prior experience in analog/mixed signal simulations is preferred.

• Solid understanding of VLSI circuits and Spice simulator experience along with commercial characterization tool experience is expected.

• Understand the I/O circuit architecture and write stimulus for Timing/Power characterization.

• Need to be familiar with various Liberty models including NLDM, CCS, LVF.

• Work with internal customers to understand the requirements and support the SoC team on behavioral models and timing models throughout the design cycle.

• Exposure to RTL to GDSII flow is required. Understanding of STA and exposure to the flow is necessary.

• Interaction with tool vendors to drive the flow improvements and methodologies to address the requirements from latest technologies

• Solid understanding of VLSI circuits and Spice simulator experience along with commercial characterization tool experience is expected.

• Drive and build automation with any of the scripting languages like Python/Perl/TCL to improve the productivity and quality.

• Responsible for developing new methodologies and flows to support complex designs, driving the design verification reviews, automation and drive productivity & quality.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.

PhD in Science, Engineering, or related field.

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field.•

Preferred Qualifications

• Bachelor's degree in Electrical Engineering, Computer Science, or Computer Engineering.

• 3+ years in RTL coding, Verilog and System Verilog Test benches, Design verification, IP characterization or related work experience.

• 2+ years experience with design verification methods.

• 2+ years experience with scripting tools and programming languages.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.