דרושים Senior Asic Hardware Design Engineer ב-אנבידיה ב-Israel, South District, Beer Sheva

What you'll be doing:

• Develop and maintain the simulation’s verification system and supporting infrastructure - design frameworks and tools that enable efficient test creation, execution, and analysis for complex hardware simulations.

• Implement and automate multi-node verification tests to validate system behavior, scalability, and performance across distributed environments.

• Own CI/CD pipelines and testing automation ensuring reliability, repeatability, and fast iteration cycles for simulation releases.

• Collaborate closely with design and DevOps teams to integrate new hardware models, test scenarios, and infrastructure improvements.

• Drive innovation in simulation verification - continuously improve coverage, debug efficiency, and system authenticity.

• B.Sc. or equivalent in Computer Science, Software Engineering, Computer Engineering, Electrical Engineering, or a related field.

• 4+ years of hands-on experience in Python and C/C++, with strong debugging and object-oriented design skills.

• Experience in verification infrastructure or test automation frameworks (e.g., Pytest, custom frameworks).

• Solid understanding of Linux systems - including scripting, debugging (gdb), and containerized environments (e.g., Docker).

• Familiarity with CI/CD pipelines and DevOps workflows (Jenkins, Git, Gerrit).

• Knowledge of Inter-Process Communication (IPC) mechanisms (sockets, message queues, shared memory).

• Creative, proactive, and detail-oriented team player with a passion for reliable systems.

Ways to Stand Out from the Crowd

• Experience in simulation or emulation systems, especially those modeling hardware or distributed environments.

• Familiarity with networking or GPU architectures, or other hardware/software co-simulation domains.

• Proven experience developing multi-node or multi-platform verification environments.

• Strong background in automation, CI integration, and test scalability.

• Excellent communication skills and ability to collaborate across design, firmware, and infrastructure teams.

As a member of the team, you will be a part of cutting edge Python-based SW project using advanced techniques such as white box testing, multi-thread environment and more. You will gain unique knowledge of how switch operating system works and how large scale networks are constructed. Teams utilize the latest software engineering methodologies and tools in an agile fashion to release on time. Are you ready for this challenge?

What you will be doing:

• Design, develop, optimize and maintain APIs, tools and libraries for Verification networking infrastructure

• Collaborate with team members, Architects, design, QA teams, and customers (both external and internal)

• Design, develop, execute and maintain tests automation for release features.

What we need to see:

• B.Sc in Computer Science or equal program

• 5+ years of proven experience with object oriented programming languages: Python/ Java/ C#

• 5+ years of proven experience with computer networks, Layer-2 and/or Layer-3

• Strong technical abilities, problem solving, design, coding and debugging skills

• Ability to lead feature development, take full ownership of tasks from A-Z and deliver independently with minimum supervision

• Great teammate with multi-tasking ability and good interpersonal skills

Ways to stand out from the crowd:

• Background in C and/or Python programming

• Experience in Jenkins pipelines

• Experience with MS-SQL

What you will be doing:

• Join Beer-Sheva/Tel-Aviv group, working on design in the field of encryption accelerators.

• Design of chip blocks/entities according to specifications under challenging constraints and with high orientation to power, area and performance.

• Daily work will involve design and might involve any or all aspects of chip development including design and micro-architecture.

• Work closely with firmware and other groups around the globe.

• Work mode: Hybrid home-office

What we need to see:

• B.SC./M.SC. or equivalent experience in ElectricalEngineering/CommunicationEngineering/Computer Engineering

• 5+ years of validated experience in RTL Frontend ASIC design (Chip Design)

• High Level of English

Ways to stand out from the crowd:

• Experience in RTL Frontend ASIC Design

• Knowledge in Verilog

• Experience with physical design aspects

What you will be doing:

• Participate in micro-architecture development and document specifications.
• Build System Verilog UVM verification environments for IPs in areas of crypto and Risc-V platforms.
• Build verification and test plans to get to complete coverage.
• Work with the designers in our team to debug and clean all bugs
• Deliver the IPs to higher level verification like Cluster, FC and emulation.

What we need to see:

• A bachelor’s degree in electrical engineering or computer engineering
• 5+ years of relevant experience in verification of complex designs.
• Proficient in System-Verilog and UVM methodology.
• Good interpersonal skills. And team player.

Ways to stand out from the crowd:

• Background with crypto RTL units (AES, RSA, PQC)
• Experience working on Risc-V or Risc-V peripherals
• Experience working in a diverse and global environment (working with engineers from China, India, and the US).

What you will be doing:

• Participate in micro-architecture development and document specifications.

• Implement in RTL and work with the verification team to ensure that the design is functional.

• Apply logic design skills to optimize and meet performance and power goals.

• Deliver a synthesis/timing clean design while working with the physical design team to ensure a routable and physically implementable design.

What we need to see:

• A Bachelor’s degree in electrical engineering or computer engineering

• 5+ years of relevant experience in chip design development of complex designs

• Highly proficient in logic design, Verilog, and/or System-Verilog, with a deep understanding of physical design and VLSI.

• Good interpersonal skills. And team player

What you will be doing:

• Participate in micro-architecture development and document specifications.

• Implement in RTL and work with the verification team to ensure that the design is functional.

• Apply logic design skills to optimize and meet performance and power goals.

• Deliver a synthesis/timing clean design while working with the physical design team to ensure a routable and physically implementable design.

What we need to see:

• A Bachelor’s degree in electrical engineering or computer engineering

• 5+ years of relevant experience in chip design development of complex designs

• Highly proficient in logic design, Verilog, and/or System-Verilog, with a deep understanding of physical design and VLSI.

• Good interpersonal skills. And team player