Intel Senior IP System Validation Engineer 

Malaysia, Penang 

331068771

. The experienced engineerrobust and high-qualitytest coverage plan to validate various IP’s and protocols on, PCIe, DDR, UCIeusing FPGA based early prototyping and emulation validation hardware

The responsibilities cover:

- scoping and development of validation test plans, and execution for latest generation IP's and SoC’s.
- contribute to testbench bring-up and troubleshooting which involve FPGA boards, test cards and debug tools.

- deliver proper documentation for validation strategies, plans, best-known methods and learning.

minimize project execution timewhile increasing efficiency.

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits