דרושים Cpu Verification Infrastructure Tools Architect ב-אנבידיה ב-India, Bengaluru

What you’ll be doing:

• Own ASIC verification of IP/Cluster for complicated designs in RTL.

• Work with HW architects and designers to make the right implementation choices.

• Interact with the Performance verification teams to augment verification through dynamic simulations and/or Formal verification techniques.

• You will work with the specifications and ensure functional and code coverage of all the RTL which you will verify.

• Partner with and enable FPGA and S/W teams to ensure that S/W is tested.

• Be involved with post-silicon verification and debug.

What we need to see:

• BS / MS or equivalent experience.

• 2+ years of design experience.

• Experience in ASIC verification of complex design units for at least one or two projects.

• Background with design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB).

• Exposure to System Verilog and UVM based methodology for ASIC verification is highly desired.

Ways to stand out from the crowd:

• Knowledge of Memory controllers or prior experience with verification of IP/clusters involving access to Memory.

• Good debugging and problem solving skills.

• Scripting knowledge (Python/Perl/shell).

• Good interpersonal skills and ability & desire to work as a part of a team.

What you'll be doing:

• Modeling and analysis of graphics and / or SOC algorithms and features

• Work in a matrixed environment, across the different modelling teams, to document, design, develop tools to analyze and simulate, validate, and verify models

• Familiarize with the different models (functional and performance) that are used at Nvidia and help with feature implementation as required.

• Develop tests, test plans, and testing infrastructure for newarchitectures/features.

• Mentor younger engineers and help sustain good coding practices.

• Learn about newer modelling techniques and frameworks, evaluate the best solution for our needs and work with your manager to drive the change

• Help develop AI based tools to increase efficiency.

What we need to see:

• Bachelors Degree (or equivalent experience) in a relevant discipline (Computer Science, Electrical Engineering or Computer Engineering)

• 8+ years of relevant work experience or MS with 5+ years of experience or PhD with 2+ years of experience

• Strong programming ability: C++, C along with a good understanding of build systems (CMAKE, make), toolchains (GCC, MSVC) and libraries (STL, BOOST)

• Computer Architecture background with experience in performance modeling with C++ and SystemC preferred

• Familiarity with Docker, Jenkins, Python, Perl

• Excellent communication and interpersonal skills and ability to work in a distributed team environment.

What you'll be doing:

• Performance analysis/ bottleneck analysis of complex, high performance GPUs and System-on-Chips (SoCs).

• Work on hardware models of different levels of extraction, including performance models, RTL test benches and emulators to find performance bottlenecks in the system.

• Work closely with the architecture and design teams to explore architecture trade-offs related to system performance, area, and power consumption.

• Understand key performance usecases for the product. Develop workloads and test suites targeting graphics, machine learning, automotive, video, compute vision applications running on these products.

• Drive methodologies for improving turnaround time, finding representative data-sets and enabling performance analysis early in the product development cycle.

• Develop required infrastructure including performance simulators, testbench components and analysis tools.

What we need to see:

• BE/BTech or MS/MTech, or equivalent experience in relevant area, PhD is a plus.

• 3+ years of relevant experience dealing with system level architecture and performance issues.

• Strong understanding of System-on-Chip (SoC) architecture, graphics pipeline, CPU architecture, memory subsystem architecture and Network-on-Chip (NoC)/Interconnect architecture.

• Solid programming (C/C++) and scripting (Bash/Perl/Python) skills. Exposure to Verilog/System Verilog, SystemC/TLM is a strong plus.

• Strong debugging and analysis (including data and statistical analysis) skills, including use of RTL dumps to debug failures.

• Exposure to performance simulators, cycle accurate/approximate models or emulators for pre-silicon performance analysis is a plus.

• Excellent communication and organization skills.

• Ability to work in a global team environment.

Ways to stand out from the crowd:

• Strong background in System Level Performance aspects for Graphics and High Performance Computing.

• Exposure to GPU application programming interfaces like CUDA, OpenGL, DirectX.

• Expertise in data analysis and visualization.

• Understand architecture/design and write test plans that are efficient yet exhaustive in coverage.
• Development of test environment such ascreation/modificationof testbench, updates to software sequences, creation/integration of checkers from UV.
• Execute the test plan, review results with arch/design teams for final signoff.
• Close collaboration with Emulation/FPGA teams to enable our tests and verify the tests on post silicon.
• Innovative optimizations to reduce simulation time and improve verification work flows.
• Work with HW architects and designers to make the right implementation choices to optimize the whole pipeline.

• B.Tech/M.Tech or equivalent experience.
• 4+ years of relevant experience.
• Expertise in verification at sub-system/SOC level and expertise in Verilog and SystemVerilog.
• Expertise in debugging functional and toggle coverage.
• Some experience in UVM is good to have.
• Proficiency in grasping feature requirements for intricate features at the system level and devising test plans to validate them.
• Strong problem-solving skills.
• Strong interpersonal and team building skills with proficiency in written and verbal communications.

• Grasp of system architecture concepts in the context of fullchip verification, like interrupts, error collators, handshakes, IO handling etc.
• Expertise in protocols like APB/AXI/CHI.
• Experience with JTAG and DFT concepts like mbist/lbist.

We are now looking for passionate, highly motivated and creative individuals to be part of our automotive verification team. As a verification owner, you will work on projects that will define the next generation of automotive chips and systems. You will get firsthand exposure to high performance CPU and Memory sub-systems, NOC based Interconnect Fabric, High speed IO's and many other leading technologies deployed in our Tegra chips.

What you will be doing:

You will be responsible for creation of "state of the art" UVM based verification test benches and methodologies to verify complex IP's and Sub-systems. You will also get to work on System level verification using C/C++. During the course of a project you would end up driving the following aspects of verification for your unit:

• Architect the testbenches and craft verification environment using UVM methodology

• Define test plans, tests and verification infrastructure for modules, clusters and system

• Build efficient and reusable bus functional models, monitors, checkers and scoreboards

• Implement functional coverage and own verification closure

• Work with architects, designers, FPGA and post-silicon teams to ensure that your unit is robust

What we need to see:

You should be BTech/MTech with 5+ years of experience in verification closure of complex Unit, Sub-system or SOC level verification. If you have experience in at least a few of the following domains, we will have an excellent match for our needs:

• CPU verification, Memory controller verification, Interconnect verification

• High Speed IO verification (UFS/PCIE/XUSB)

• 10G/1G Ethernet MAC and Switch

• Bus protocols (AXI/APB)

• System functions like Safety, Security, Virtualization and sensor processing

• Experience in the latest verification methodologies like UVM/VMM

• Exposure to industry standard verification tools for simulation and debug is a requirement

• Exposure to Formal verification would be excellent

• Good debugging and analytical skills.

• Good interpersonal skills, ability to work as an excellent teammatewith e

What you'll be doing:

• Develop AI performance tools for large scale AI systems providing real time insight into applications performance and system bottlenecks.

• Conduct in-depth hardware-software performance studies

• Define performance and efficiency evaluation methodologies

• Automate performance data analysis and visualization to convert profiling data into actionable optimizations

• Support deep learning software engineers and GPU architects in their performance analysis efforts

• Work with various teams at NVIDIA to incorporate and influence the latest technologies for GPU performance analysis

What we need to see:

• Minimum of 8+ years of experience insoftware infrastructure and tools

• BS or higher degree in computer science or similar (or equivalent experience)

• Adept programming skills in multiple languages including C++ and Python

• Solid foundation in operating systems and computer architecture

• Outstanding ability to understand users, prioritize among many contending requests, and build consensus

• Passion for “it just works” automation, eliminating repetitive tasks, and enabling team members

Ways to stand out from the crowd:

• Experience in working with the large scale AI cluster

• Experience with CUDA and GPU computing systems

• Hands-on experience with deep learning frameworks (TensorFlow, PyTorch, JAX/XLA etc.)

• Deep understanding of the software performance analysis and optimization process