מצאו את ההתאמה המושלמת עבורכם עם אקספוינט! חפשו הזדמנויות עבודה בתור Systemc Modeling Expert ב-Israel, Haifa והצטרפו לרשת החברות המובילות בתעשיית ההייטק, כמו Mobileye. הירשמו עכשיו ומצאו את עבודת החלומות שלך עם אקספוינט!
Hands-on physical design block owner from RTL to GDS with horizontal ownership. Floorplan exploration and collaboration with front-end and architecture teams. Synthesis exploration and final synthesis including: SDC definition, Scan...
תיאור:
What will your job look like:
Hands-on physical design block owner from RTL to GDS with horizontal ownership.
Floorplan exploration and collaboration with front-end and architecture teams.
Synthesis exploration and final synthesis including: SDC definition, Scan insertion, Lint, LEC, UPF-LP & Spyglass verification.
Place & Route: from Synthesis to final layout and signoff verification on all tools and floors, with target to achieve best PPA.
STA: timing analysis, working with Sub System and Full Chip owners to manage block and top level constraints for synthesis, P&R and signoff.
Signoff : on all physical design domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification
All you need is:
BSc or MSc degree in Computer Engineering or Electrical Engineering.
8+ years experience in the Physical Design field.
Experience with high speed interfaces (DDR/PCIE) - an advantage.
Experience with advanced nodes (5nm and below) - an advantage.
Team player with excellent communication skills, customer orientation, and a “can-do” attitude.
Building or maintaining implementation tools and flow - an advantage.
Experience in scripting languages like Tcl/Python/Perl/TCSH.
You will work on Critical performance analysis and optimizations on the ASIC micro architecture as multi-NOC , DDR and CPU . You will work on developing SystemC models that describe...
תיאור:
The position
The SystemC models are fundamental parts of the VLSI chip infrastructure, they are used during HW architecture definition phase and by SW developers for system shift left.
What will your job look like:
You will work on Critical performance analysis and optimizations on the ASIC micro architecture as multi-NOC , DDR and CPU .
You will work on developing SystemC models that describe the RTL models on High level language and enable true system . level shift left for the embedded SW team.
You will have the opportunity to work on state-of-the-art simulation and profiling tools and adopt them to Mobileye's needs.
You will work closely with HW architects and SW/Algorithms developers .
All you need is:
BSc in Computer-Science, Computer Engineering or Electrical Engineering.
5+ years of experience on SystemC Modeling -Must
5+ years of experience in embedded SW.
knowledge in shell scripting and Python.
Strong communication, co-working, and listening skills.
Experience working with Synopsys tools as Power architect and Virtualizer – Advantage.
Knowledge in assembly languages and hardware design aspects – Advantage.
You will work on Critical performance analysis and optimizations on the ASIC micro architecture as multi-NOC , DDR and CPU . You will work on developing SystemC models that describe...
תיאור:
The position
The SystemC models are fundamental parts of the VLSI chip infrastructure, they are used during HW architecture definition phase and by SW developers for system shift left.
What will your job look like:
You will work on Critical performance analysis and optimizations on the ASIC micro architecture as multi-NOC , DDR and CPU .
You will work on developing SystemC models that describe the RTL models on High level language and enable true system . level shift left for the embedded SW team.
You will have the opportunity to work on state-of-the-art simulation and profiling tools and adopt them to Mobileye's needs.
You will work closely with HW architects and SW/Algorithms developers .
All you need is:
BSc in Computer-Science, Computer Engineering or Electrical Engineering.
5+ years of experience on SystemC Modeling -Must
5+ years of experience in embedded SW.
knowledge in shell scripting and Python.
Strong communication, co-working, and listening skills.
Experience working with Synopsys tools as Power architect and Virtualizer – Advantage.
Knowledge in assembly languages and hardware design aspects – Advantage.
Leading FC timing activities & methodologies for brand New SoC, from definition to TO. Writing design constraints (SDC) for FC/IP/Block levels for all modes. Involved in chip architecture definition for...
תיאור:
What will your job look like:
Leading FC timing activities & methodologies for brand New SoC, from definition to TO.
Writing design constraints (SDC) for FC/IP/Block levels for all modes.
Involved in chip architecture definition for functional & DFT domains.
Working in close collaboration with the front-end & architecture team.
Working with engineers to identify and overcome roadblocks and obstacles.
Defining AC timing from spec to implementation.
Supporting complex clock structures.
All you need is:
BSc/MSc in Electrical Engineering/Computer Science.
STA Expert (Prime-Time/Signoff).
8 years of experience in VLSI backend (RTL2GDS).
5 years of experience in full chip STA on complex SoCs.
Expert knowledge in timing closure & signoff methodologies.
Experience with DFT architecture, Async timing concepts & verification.
Experience in technically leading complex backend activities, preferably of complete SoC's.
Expert knowledge of the entire backend design flow from RTL to TO. (Synthesis, FP, PnR , CTS , STA, EM/IR, Chip Integration, high-frequency designs).
Hands-on physical design block owner from RTL to GDS with horizontal ownership. Floorplan exploration and collaboration with front-end and architecture teams. Synthesis exploration and final synthesis including: SDC definition, Scan...
תיאור:
What will your job look like:
Hands-on physical design block owner from RTL to GDS with horizontal ownership.
Floorplan exploration and collaboration with front-end and architecture teams.
Synthesis exploration and final synthesis including: SDC definition, Scan insertion, Lint, LEC, UPF-LP & Spyglass verification.
Place & Route: from Synthesis to final layout and signoff verification on all tools and floors, with target to achieve best PPA.
STA: timing analysis, working with Sub System and Full Chip owners to manage block and top level constraints for synthesis, P&R and signoff.
Signoff : on all physical design domains- STA, IR/EM, Physical Verification, Logic Equivalent Checking, Low Power Verification
All you need is:
BSc or MSc degree in Computer Engineering or Electrical Engineering.
8+ years experience in the Physical Design field.
Experience with high speed interfaces (DDR/PCIE) - an advantage.
Experience with advanced nodes (5nm and below) - an advantage.
Team player with excellent communication skills, customer orientation, and a “can-do” attitude.
Building or maintaining implementation tools and flow - an advantage.
Experience in scripting languages like Tcl/Python/Perl/TCSH.
בואו למצוא את עבודת החלומות שלכם בהייטק עם אקספוינט. באמצעות הפלטפורמה שלנו תוכל לחפש בקלות הזדמנויות Systemc Modeling Expert בחברת Mobileye ב-Israel, Haifa. בין אם אתם מחפשים אתגר חדש ובין אם אתם רוצים לעבוד עם ארגון ספציפי בתפקיד מסוים, Expoint מקלה על מציאת התאמת העבודה המושלמת עבורכם. התחברו לחברות מובילות באזור שלכם עוד היום וקדמו את קריירת ההייטק שלכם! הירשמו היום ועשו את הצעד הבא במסע הקריירה שלכם בעזרת אקספוינט.