Hands-on physical design block owner from RTL to GDS with horizontal ownership. Floorplan exploration and collaboration with front-end and architecture teams. Synthesis exploration and final synthesis including: SDC definition, Scan...
You will work on Critical performance analysis and optimizations on the ASIC micro architecture as multi-NOC , DDR and CPU . You will work on developing SystemC models that describe...
You will work on Critical performance analysis and optimizations on the ASIC micro architecture as multi-NOC , DDR and CPU . You will work on developing SystemC models that describe...
Leading FC timing activities & methodologies for brand New SoC, from definition to TO. Writing design constraints (SDC) for FC/IP/Block levels for all modes. Involved in chip architecture definition for...
Hands-on physical design block owner from RTL to GDS with horizontal ownership. Floorplan exploration and collaboration with front-end and architecture teams. Synthesis exploration and final synthesis including: SDC definition, Scan...