דרושים ארכיטקט פתרונות ב-Arm ב-India, Bengaluru

Responsibilities

• As a creative design engineer with a knowledge of subsystems and SoCs you will be part team developing Subsystems & SoCs.
• You will work with Architects to capture the requirements and develop Micro-architecture specifications for one or more SOC areas such as Power Management, Boot, Debug, Clocks, Resets, DDR, RAS, Security, Access Control, Die to Die etc.
• Key responsibilities will include writing micro-architecture and work with Design team to deliver high quality RTL.
• Collaborate with verification and Validation team to review test plans, and help debug design issues. Closely work with the Power and Performance analysis team to evaluate and improve Subsystem/SOC PPA.
• Contribute to developing and improving the design methodologies.
• Guide and support other members of the team for overall Program success. Balance other opportunities such as working with Project Management on activities, plans, and schedules

Required Skills and Experience:

• Bachelors or Master’s degree or equivalent experience in Electronics/Electrical Engineering.
• Experience of 8+ years working in design of complex compute subsystems or SoCs
• Expertise in developing Micro-architecture and Design specifications for the SoC Infrastructure areas such as Power Management, Boot, Debug, Clocks, Resets, DDR, RAS, Security, Access Control, Die to Die etc.
• Solid understanding of digital hardware design and Verilog HDL. Experience in development and Tapeout of Complex SoC and RTL Development.
• Experience leading and developing RTL for Subsystems or SoCs.
• Conversant with Lint, CDC and RDC flows.
• Good communication (written, verbal, presentations) skills.
• Experience with Perl, Python or other scripting language

Desired Skills and Experience:

• Experience with ARM-based designs and/or ARM System Architectures
• Experience developing subsystems for PCIe, LPDDR, HBM, UCIe, Ethernet
• Experience with SystemVerilog and verification methodologies – UVM/OVM
• Experience leading small teams or projects
• Experience or knowledge in the following areas
• Synthesis and timing analysis
• Static design checks, including CDC, RDC, X-Propagation, Linting
• Power management techniques
• DFT and physical implementation

Arm System IP enables designers to build Arm AMBA systems that are high performance, power efficient and reliable. Configurable for many different applications, System IP is the right choice for your system whether it is a high-efficiency IoT endpoint or a high-performance server SoC.

Our group is seeking dedicated verification engineers to deploy and implement designs and products.

• Build and maintain detailed verification plans/strategies for our next generation interconnect designs.
• Work alongside architects and designers to debug and develop new features balancing the needs of multiple partners in our product development cycle.
• Architect and develop sophisticated and efficient SystemVerilog/UVM based test benches.
• Debug functional regression failures, close coverage and drive improvements.

• Bachelors, Masters or PhD in Electrical/Computer Engineering or Computer Science
• 7+ years of experience in verification/RTL design.
• Multiprocessing microarchitecture experience including knowledge of cache coherence and bus protocols (e.g. AMBA5 CHI, AMBA4 ACE or AXI).
• Previous experience in specification, creation, and debug of System Verilog/UVM constrained-random testbenches.
• Software engineering skills including understanding of object-oriented programming, data structures, and algorithms.
• Proficiency with functional coverage verification methods.

• Knowledge of high speed protocols such as PCI Express (PCIe), SATA, USB and Ethernet.
• Excellent knowledge of scripting languages such as Python or Perl.
• Experience in Formal Verification techniques is a plus.

As a member/lead of SOC emulation team you will be involved in:

• Supporting multiple Emulation environments using the latest emulation techniques.
• Building early SoC platforms to facilitate performance/power analysis and debug. Able to handle/modify RTL and stitch together SoCs with standardized interfaces from scratch for bare-metal and validation OS based bringups. Collaboration with design teams to ensure the production of clean RTL code.
• Developing system level testbenches to implement performance and power benchmarks, simpoints and use cases in emulation platform. Integrate observation options to assemble and debug performance/power studies, correlate with pre-Si simulation/post-Si, lead larger implementation teams for emulation at later implementation phases and work with post-Si teams for analysis/tuning. Help drive innovation in model building and debugging methodologies.
• Collaborate with SoC Architecture team to create testplans covering all metrics for the product. Define flexible/reduced SoC configurations allowing reduction in simulation and emulation capacities, while providing accurate performance estimates. Collaborate with emulation vendors to define distributed systems to split huge SOC netlist between multiple emulation boxes.

• Experience (3-6 years) in SoC Performance verification and emulation environment bringup in the semiconductor industry.
• A background in Electrical Engineering, Computer Engineering, or Computer Science with an expertise in computer architecture and microarchitecture.
• Proficient in RTL (SystemVerilog, Verilog, VHDL), C/C++ for bare metal code, system validation using OS, test code development, strong scripting capabilities, particularly in Python, TCL, and shell scripting.
• Excellent communication, and interpersonal skills with ability to convey complicated solutions.
• Drive early and detailed performance/power analysis as an expert Emulation Architect at Arm, focusing on diverse silicon platforms

• Experience in developing, building, and releasing large multi-billion gate hardware emulation models. In-depth knowledge of key hardware emulation vendor solutions for emulation and prototyping.
• Experience working with design and software teams on design verification tests, PPA workloads, and software workloads.

In this role, you will be responsible for planning and leading the development of System Cybersecurity for the Mali and Immortalis GPUs.

• Identification and negotiation of product security objectives in collaboration with customers or product managers.
• Planning system security activities during development. Communication of HW & SW security requirements to HW and SW teams. Support traceability of the requirements.
• Contribute to the system architecture definition, including definition of a system security concept and security mechanisms. Perform security analysis (threat modelling and risk assessment) to evaluate the sufficiency of the security solutions.
• Support the HW Verification Lead in verification planning at the system level, ensuring that security aspects are covered.
• Guide, train and mentor colleagues to understand how to reduce exposure to vulnerabilities, potential side channels and attack surfaces.

• Experience with system development adhering to ISO/SAE 21434 Cybersecurity Standard for Road Vehicles.
• Good understanding of embedded systems with software, firmware and hardware components. Experience identifying and mitigating security vulnerabilities in such systems.
• Experience working to cybersecurity requirements, threat modelling, development of security mechanisms and incident management.
• Ability to work with a high level of independence and schedule own work and tasks. Communicate effectively in spoken and written English.

• Familiarity with functional safety aspects of design and verification in alignment with ISO 26262 or IEC 61508, including failure mode analysis.
• Whole lifecycle experience in the development of complex digital hardware units from specification to design sign-off.
• Experience with high level programming in languages such as C/C++.
• Leadership experience
• Experience of presenting and explaining technical material to customers and colleagues as well as at international conferences.

Working on interesting new projects is exciting, but we also know how important it is to receive support. We make sure you have regular time with your line manager who can offer ongoing support, feedback, and development opportunities. You will also be given flexibility and freedom in how you decide to complete your projects/tasks.

As a member/lead of SOC emulation team you will be involved in:

• Supporting multiple Emulation environments using the latest emulation techniques.
• Building early SoC platforms to facilitate performance/power analysis and debug. Able to handle/modify RTL and stitch together SoCs with standardized interfaces from scratch for bare-metal and validation OS based bringups. Collaboration with design teams to ensure the production of clean RTL code.
• Developing system level testbenches to implement performance and power benchmarks, simpoints and use cases in emulation platform. Integrate observation options to assemble and debug performance/power studies, correlate with pre-Si simulation/post-Si, lead larger implementation teams for emulation at later implementation phases and work with post-Si teams for analysis/tuning. Help drive innovation in model building and debugging methodologies.
• Collaborate with SoC Architecture team to create testplans covering all metrics for the product. Define flexible/reduced SoC configurations allowing reduction in simulation and emulation capacities, while providing accurate performance estimates. Collaborate with emulation vendors to define distributed systems to split huge SOC netlist between multiple emulation boxes.

• Experience (+10 years) in SoC Performance verification and emulation environment bringup in the semiconductor industry.
• A background in Electrical Engineering, Computer Engineering, or Computer Science with an expertise in computer architecture and microarchitecture.
• Proficient in RTL (SystemVerilog, Verilog, VHDL), C/C++ for bare metal code, system validation using OS, test code development, strong scripting capabilities, particularly in Python, TCL, and shell scripting.
• Excellent communication, and interpersonal skills with ability to convey complicated solutions.
• Drive early and detailed performance/power analysis as an expert Emulation Architect at Arm, focusing on diverse silicon platforms

• Experience in developing, building, and releasing large multi-billion gate hardware emulation models. In-depth knowledge of key hardware emulation vendor solutions for emulation and prototyping.
• Experience working with design and software teams on design verification tests, PPA workloads, and software workloads.

As a member/lead of SOC emulation team you will be involved in:

• Supporting multiple Emulation environments using the latest emulation techniques.
• Building early SoC platforms to facilitate performance/power analysis and debug. Able to handle/modify RTL and stitch together SoCs with standardized interfaces from scratch for bare-metal and validation OS based bringups. Collaboration with design teams to ensure the production of clean RTL code.
• Developing system level testbenches to implement performance and power benchmarks, simpoints and use cases in emulation platform. Integrate observation options to assemble and debug performance/power studies, correlate with pre-Si simulation/post-Si, lead larger implementation teams for emulation at later implementation phases and work with post-Si teams for analysis/tuning. Help drive innovation in model building and debugging methodologies.
• Collaborate with SoC Architecture team to create testplans covering all metrics for the product. Define flexible/reduced SoC configurations allowing reduction in simulation and emulation capacities, while providing accurate performance estimates. Collaborate with emulation vendors to define distributed systems to split huge SOC netlist between multiple emulation boxes.

• Experience (+10 years) in SoC Performance verification and emulation environment bringup in the semiconductor industry.
• A background in Electrical Engineering, Computer Engineering, or Computer Science with an expertise in computer architecture and microarchitecture.
• Proficient in RTL (SystemVerilog, Verilog, VHDL), C/C++ for bare metal code, system validation using OS, test code development, strong scripting capabilities, particularly in Python, TCL, and shell scripting.
• Excellent communication, and interpersonal skills with ability to convey complicated solutions.
• Drive early and detailed performance/power analysis as an expert Emulation Architect at Arm, focusing on diverse silicon platforms

• Experience in developing, building, and releasing large multi-billion gate hardware emulation models. In-depth knowledge of key hardware emulation vendor solutions for emulation and prototyping.
• Experience working with design and software teams on design verification tests, PPA workloads, and software workloads.