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Google Testchip Backend Lead 
United States, California, Mountain View 
734638396

25.02.2025
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 8 years of experience with tapeout of SoC in physical design
  • Experience with full-chip IO, clocking, and block placement

Preferred qualifications:
  • Experience of digital design fundamentals and methodologies, with knowledge of physical design from definition to implementation and final tapeout.
  • Experience with multiple foundries PDK design.
  • Experience leading testchip/SoC with process technology.
  • Experience with physical design verification along with all signoff design.
  • Experience with LPDDR and SERDES IP integration such as PCIe, D2D UCIe, low power IP into SoC.
  • Excellent statistics, data analysis, teamwork, and communication skills.